To build a programmable fault circuit interrupter, use a Zero-Sequence Current Transformer (ZCT) feeding an instrumentation amplifier (INA128) biased at 1.65V, sampled by the ESP32's ADC1 (GPIO 36) at 4kHz to detect 5mA imbalances within 25ms. Unlike dedicated ASICs like the RV4145N, a microcontroller-based topology allows you to implement custom trip curves, log transient events via MQTT, and even perform Fast Fourier Transform (FFT) analysis to detect arc faults (AFCI) alongside standard ground faults (GFCI).
The Core Topology: Microcontroller-Based Fault Circuit Interrupter Sensing
Standard electromechanical GFCIs rely on analog comparators and silicon-controlled rectifiers (SCRs) to trip a solenoid. Our solid-state topology replaces the analog trip logic with an ESP32, enabling digital filtering and IoT telemetry while maintaining the fundamental physics of Kirchhoff’s Current Law: the current flowing out on the Line conductor must exactly equal the current returning on the Neutral conductor.
Topology Description and Node Labels
The sensing chain consists of five critical nodes. Understanding the signal transformation at each stage is vital for debugging noise issues later.
- Node A (Primary Pass-Through): Both Line and Neutral conductors pass through the center of a high-permeability toroidal ZCT core. Under normal conditions, their magnetic fields cancel perfectly.
- Node B (ZCT Secondary Output): A 1000-turn secondary winding on the ZCT. Any imbalance (leakage to ground) generates a proportional AC current here. A 33kΩ burden resistor converts this current into a measurable AC voltage.
- Node C (Instrumentation Amp Output): The INA128 amplifies the millivolt-level signal from Node B. Crucially, this node is DC-biased to 1.65V so the bipolar AC waveform sits entirely within the ESP32’s unipolar 0–3.3V ADC range.
- Node D (ESP32 ADC Input): GPIO 36 (ADC1_CH0). We strictly use ADC1 because ADC2 channels are disabled when the ESP32’s WiFi radio is active—a common trap that causes embedded GFCI monitors to go blind during network transmissions.
- Node E (Trip Control Output): GPIO 26 drives an opto-isolated solid-state relay (SSR) or a contactor driver to physically break the mains circuit when a fault is calculated.
Why This Topology Over the Alternative?
The primary alternative is using a Hall-effect sensor (like the ACS712) on the ground wire, or using a dedicated GFCI ASIC. Hall-effect sensors measure absolute current and suffer from thermal drift and external magnetic interference, leading to nuisance trips. A ZCT measures only the differential (common-mode) current, making it immune to load magnitude and external magnetic fields. Compared to a dumb ASIC, the ESP32 topology allows you to implement a 10ms digital moving-average filter to ignore harmless capacitive leakage from modern switching power supplies, drastically reducing nuisance trips.
Component Selection and Design Walkthrough
Designing the analog front-end requires matching the ZCT turns ratio to the ESP32’s 12-bit ADC resolution (which realistically yields about 10 bits of usable, noise-free data). We are targeting a standard 30mA trip threshold with 5mA resolution.
Calculating Real Component Values
- The ZCT: We use a 1000:1 turns ratio nanocrystalline toroid. A 30mA primary leakage yields a 30µA secondary current (30mA / 1000).
- Burden Resistor (Node B): To get a usable voltage, we use a 33kΩ precision (1%) metal film resistor. 30µA × 33kΩ = 0.99V peak AC.
- Bias Network: Two 10kΩ resistors form a voltage divider across the 3.3V rail, creating a stiff 1.65V DC offset. A 10µF bypass capacitor to ground stabilizes this node.
- Amplifier Gain: The INA128 gain is set by a single resistor ($R_G$) using the formula $G = 1 + (49.4k\Omega / R_G)$. To amplify our 0.99V peak to roughly 2.0V peak (leaving headroom below the 3.3V rail), we need a gain of ~2. Therefore, $R_G = 49.4k\Omega$. We use a standard 49.9kΩ 1% resistor.
Behavior Table: Parameter Sensitivity
Understanding how component drift affects the topology is critical for safety certification and reliable operation.
| Component Changed | Modification | Effect on Fault Circuit Interrupter Behavior |
|---|---|---|
| Burden Resistor | Drops to 10kΩ | Sensitivity plummets. 30mA leakage yields only 0.3V peak. Signal is lost in the ESP32 ADC noise floor; device fails to trip. |
| Bias Divider | Shifts to 5kΩ/15kΩ | DC offset drops to ~0.82V. The negative peaks of the AC waveform clip at 0V. The ESP32 reads a distorted half-wave, miscalculating RMS leakage. |
| ZCT Secondary | Open circuit (broken wire) | Catastrophic failure mode. Without a burden resistor to limit it, the ZCT core saturates and generates high-voltage spikes that can destroy the INA128 input stage. |
| INA128 $R_G$ | Shorted (0Ω) | Gain maxes out. Even microamp-level noise from the Line conductor's capacitive coupling will peg the ADC at 3.3V, causing immediate nuisance tripping. |
Breadboard Testing and Failure Mode Analysis
Never test this topology directly on mains voltage. Use a 12VAC control transformer to simulate the Line and Neutral, and a power resistor as a dummy load. We will inject a known leakage to verify the ESP32's sampling logic.
Step-by-Step Breadboard Verification
- Establish the Bias: Wire the two 10kΩ resistors from the ESP32's 3.3V pin to GND. Measure the midpoint with a multimeter; it must read exactly 1.65V (±0.05V). Connect the 10µF capacitor from this midpoint to GND.
- Wire the INA128: Connect V+ to 5V (or 3.3V if using a rail-to-rail variant like the INA333, but INA128 needs dual supplies or a virtual ground. Correction for single-supply breadboarding: Swap the INA128 for an MCP6N11 instrumentation amp, which operates natively on a single 3.3V supply and handles inputs near the rails).
- Connect the ZCT: Pass both the 12VAC Line and Neutral wires through the toroid center. Connect the secondary winding across the 33kΩ burden resistor. Tie one side of the burden resistor to the 1.65V bias midpoint.
- Inject Test Leakage: Connect a 1.2kΩ resistor from the 12VAC Line (after the ZCT) to the earth ground wire (bypassing the ZCT). By Ohm's law, 12V / 1200Ω = 10mA of simulated leakage current.
- Verify ADC Sampling: Upload a simple Arduino sketch using
analogRead(36)inside a timer interrupt set to 250µs (4kHz). Open the Serial Plotter. You should see a clean sine wave centered at 1.65V, peaking at roughly 2.3V.
The ESP32's ADC is notoriously non-linear near 0V and 3.3V. By biasing our signal to 1.65V and keeping the peak amplitude under 2.5V, we operate exclusively in the highly linear middle region of the ADC curve, ensuring accurate RMS calculations for the fault circuit interrupter logic.
What Breaks at the Extremes?
When designing safety-critical embedded systems, you must analyze failure modes. If the ESP32 brownout detector (BOD) triggers due to a voltage sag when the SSR switches, the microcontroller resets. If the firmware does not immediately default GPIO 26 to a safe state (using internal pull-downs) during boot, the SSR might chatter or fail to open. Always design the SSR driver circuit to be normally open (fail-safe), requiring active GPIO drive to keep the circuit closed, or use a hardware watchdog timer to force a trip if the ESP32 locks up.
Frequently Asked Questions
How does a smart fault circuit interrupter differ from a standard GFCI outlet?
A standard GFCI outlet uses a hardwired analog ASIC (like the RV4145N) that trips instantaneously when leakage exceeds ~5mA. A smart, microcontroller-based fault circuit interrupter samples the waveform digitally. This allows it to distinguish between a dangerous resistive ground fault (a person touching a live wire) and harmless capacitive leakage (the EMI filter in a laptop power supply) by analyzing the phase angle of the leakage current relative to the voltage waveform.
Can I use an Arduino Uno instead of an ESP32 for fault circuit interrupter designs?
You can, but it is not recommended for production. The Arduino Uno's ATmega328P has a 10-bit ADC and a maximum sampling rate that struggles to capture high-frequency transients required for Arc Fault (AFCI) detection. Furthermore, the Uno lacks native WiFi for telemetry and hardware watchdogs are less robust. The ESP32's 12-bit ADC, dual cores (one for sampling, one for WiFi), and hardware timers make it the superior choice for modern digital fault interruption.
Why does my microcontroller fault circuit interrupter nuisance-trip on motor startups?
Motor startups (like a refrigerator compressor or a power tool) generate massive inrush currents and high-frequency switching noise. If your ZCT core has low permeability or poor high-frequency rejection, this common-mode noise can capacitively couple into the secondary winding, appearing as a false leakage spike. To fix this, add a 10nF ceramic capacitor in parallel with your burden resistor to create a low-pass filter, rolling off frequencies above 3kHz before they reach the instrumentation amplifier.
What is the required response time for a custom fault circuit interrupter?
According to NFPA 70 (NEC) and UL 943 standards, a standard Class A GFCI must interrupt the circuit within 25 milliseconds when the fault current reaches 30mA, and even faster at higher currents. In an ESP32 design, your sampling window, RMS calculation, and GPIO toggle must complete in under 15ms to allow 10ms for the mechanical relay or SSR to physically break the circuit and extinguish the arc.
For deeper insights into configuring the ESP32's ADC for high-speed, continuous sampling without WiFi dropouts, refer to the official Espressif ADC Oneshot Driver Documentation. For the analog front-end design, the Texas Instruments INA128 Datasheet provides critical formulas for calculating common-mode rejection ratio (CMRR) degradation when using mismatched source impedances.
