A Sallen Key filter is a widely used active electronic filter topology that employs a single operational amplifier, two resistors, and two capacitors to create a second-order frequency response without the need for bulky inductors. In a real circuit, this topology fundamentally changes your design constraints by replacing lossy, expensive, and physically large passive LC components with compact, easily tunable RC networks, while the op-amp provides crucial buffering to isolate the filter's response from downstream load impedance variations.
Unlike simple first-order RC filters that only achieve a -20 dB/decade roll-off, the second-order Sallen Key configuration delivers a steeper -40 dB/decade attenuation. This makes it the undisputed workhorse for audio crossovers, sensor signal conditioning, and data converter interfacing. Below, we break down the exact component math, real-world E24 value tradeoffs, and the silicon-level pitfalls that ruin filter response on the bench.
Topology and Component Selection Matrix
The most common variant is the unity-gain low-pass configuration. In this setup, the op-amp is wired as a voltage follower (output tied directly to the inverting input), which maximizes the circuit's gain-bandwidth headroom and ensures absolute stability. The signal passes through a two-stage RC network before hitting the non-inverting input.
To achieve a specific filter alignment—such as Butterworth (maximally flat passband), Bessel (linear phase), or Chebyshev (steeper roll-off with passband ripple)—the ratio of the resistors and capacitors must be precisely set. The table below provides a data-dense starting matrix for a Unity-Gain Low-Pass Butterworth alignment (Q = 0.707), assuming equal resistors ($R_1 = R_2 = R$) and a capacitor ratio of $C_1 = 2 \times C_2$.
| Target Cutoff ($f_c$) | Calculated R (Ideal) | Nearest E24 Resistor | Actual $f_c$ with E24 | Standard C2 (E12) | Standard C1 (E12) |
|---|---|---|---|---|---|
| 100 Hz | 112.5 kΩ | 110 kΩ | 102 Hz | 10 nF | 20 nF (use 22nF) |
| 1 kHz | 11.25 kΩ | 11 kΩ | 1.02 kHz | 10 nF | 20 nF (use 22nF) |
| 10 kHz | 1.125 kΩ | 1.1 kΩ | 10.2 kHz | 1 nF | 2 nF (use 2.2nF) |
| 100 kHz | 112.5 Ω | 110 Ω | 102 kHz | 100 pF | 200 pF |
Never use X7R or Y5V ceramic capacitors in the feedback network of a Sallen Key filter. These Class II dielectrics exhibit severe Voltage Coefficient of Capacitance (VCC) and piezoelectric microphonics. As signal voltage changes, the capacitance shifts, modulating your cutoff frequency and injecting distortion. Always specify C0G/NP0 ceramics or film capacitors (like WIMA FKP or Panasonic ECW) for filter networks.
Worked Numeric Example: 1 kHz Butterworth Design
Let’s design a unity-gain, second-order Butterworth low-pass Sallen Key filter with a target cutoff frequency ($f_c$) of exactly 1,000 Hz. We will use the standard design equations to find real-world component values.
Step 1: Establish the Capacitor Ratio
For a unity-gain Butterworth response (damping factor $\zeta = 1.414$, or $Q = 0.707$), the component ratios must satisfy $C_1 = 2 \times C_2$ when $R_1 = R_2$. Let’s select a readily available E12 capacitor value for $C_2$: 10 nF. Therefore, $C_1$ must be 20 nF.
Step 2: Calculate the Ideal Resistor Value
The cutoff frequency equation for this topology is:
$$f_c = \frac{1}{2\pi R \sqrt{C_1 C_2}}$$
Rearranging to solve for R:
$$R = \frac{1}{2\pi f_c \sqrt{C_1 C_2}}$$
Plugging in our values ($f_c = 1000$, $C_1 = 20 \times 10^{-9}$, $C_2 = 10 \times 10^{-9}$):
$$R = \frac{1}{2\pi (1000) \sqrt{200 \times 10^{-18}}} = \frac{1}{6283.18 \times 1.414 \times 10^{-8}} \approx 11,254 \, \Omega$$
Step 3: Map to E24 Standard Values
The ideal value is 11.25 kΩ. Looking at the E24 resistor series, our closest options are 11 kΩ and 12 kΩ.
- If we use 11 kΩ: $f_c = 1,023$ Hz (+2.3% error).
- If we use 12 kΩ: $f_c = 938$ Hz (-6.2% error).
For audio or general signal conditioning, a 2.3% shift is entirely negligible. We select 11 kΩ (1% tolerance metal film) for both $R_1$ and $R_2$. If absolute precision is required for an instrumentation ADC anti-aliasing stage, you would use a 10 kΩ fixed resistor in series with a 500 Ω multi-turn cermet trimmer to dial in exactly 11.25 kΩ.
Where You Meet the Sallen Key Filter in Practice
You will rarely see this topology used for RF work, but it dominates the sub-100 kHz analog frontier. Here is where it earns its keep on modern PCBs:
- ADC Anti-Aliasing: Placed immediately before a Successive Approximation Register (SAR) or Sigma-Delta ADC to aggressively attenuate frequencies above the Nyquist limit, preventing high-frequency noise from folding back into the baseband.
- DAC Reconstruction: Used at the output of a Digital-to-Analog Converter to smooth out the stair-step quantization artifacts and remove the high-frequency imaging spikes created by the sampling clock.
- Active Audio Crossovers: In powered studio monitors, Sallen Key high-pass and low-pass pairs route low frequencies to the woofer and high frequencies to the tweeter without the insertion loss of passive inductors.
Topology Comparison: Sallen Key vs. The Alternatives
When opening a schematic, you might wonder why the designer chose a Sallen Key filter over other options. Here is how it stacks up against the most common alternatives.
| Criteria | Sallen Key (Unity Gain) | Multiple Feedback (MFB) | Passive LC (Inductor-Capacitor) |
|---|---|---|---|
| Phase Inversion | No (Non-inverting) | Yes (Inverting) | No |
| Op-Amp GBWP Sensitivity | Low (Excellent stability) | High (Prone to Q-enhancement) | N/A (No active devices) |
| Component Count | 1 Op-Amp, 2 R, 2 C | 1 Op-Amp, 3 R, 2 C | 1 L, 1 C (per pole) |
| High-Frequency Behavior | Degrades (Op-amp loop gain drops) | Excellent (Maintains attenuation) | Excellent (Limited by parasitics) |
| Best Application | Audio, DAC outputs, general buffering | ADC drivers, high-Q bandpass | RF, power supplies, high current |
Bench Pitfalls and Common Confusions
Even with perfect math, a Sallen Key filter can fail catastrophically on the bench if you ignore silicon physics and layout parasitics. Here are the most common ways this circuit goes wrong.
Confusion: Sallen Key vs. Multiple Feedback (MFB)
Novices frequently confuse the Sallen Key topology with the Multiple Feedback (MFB) topology because both use one op-amp, two capacitors, and a few resistors to achieve a second-order response. The visual giveaway is the feedback path: in a Sallen Key filter, the feedback from the op-amp output routes back to the first capacitor node (or the non-inverting input for gain). In an MFB filter, the feedback routes directly to the inverting input. MFB is an inverting topology that handles high-frequency stopband attenuation much better than Sallen Key, but it is far more sensitive to the op-amp's Gain-Bandwidth Product.
The GBWP Trap: Why Your Filter Peaks at High Frequencies
The most devastating bench failure for a Sallen Key low-pass filter is high-frequency feedthrough. At frequencies far above the cutoff, the capacitors act as short circuits. In an ideal world, the signal is shunted to ground. In reality, the op-amp's open-loop gain drops as frequency increases. If the op-amp's Gain-Bandwidth Product (GBWP) is too low, it loses the authority to force the output to follow the input, and high-frequency noise "leaks" through the passive RC network directly to the output.
To maintain a clean -40 dB/decade roll-off without a secondary high-frequency peak, your op-amp's GBWP must be at least 50 to 100 times the filter's cutoff frequency. If you are designing a 100 kHz Sallen Key filter, a generic LM358 (GBWP ~1 MHz) will fail miserably, peaking and ringing. You must step up to a high-speed part like the OPA1612 (GBWP 40 MHz) or the AD8065 (GBWP 145 MHz). For automated component selection, leverage the TI Filter Designer or the Analog Devices Filter Wizard to simulate the exact closed-loop AC response with real op-amp SPICE models.
PCB Layout: The Parasitic Capacitor You Forgot
At cutoff frequencies above 50 kHz, PCB trace capacitance begins to alter your math. A standard FR4 trace running over a ground plane adds roughly 1-2 pF per centimeter. If your calculated $C_2$ value is only 100 pF, a sloppy layout can introduce a 10% error before you even power the board. Keep the RC network components physically clustered around the op-amp's non-inverting pin, use short direct traces, and consider lifting the ground plane directly beneath the high-impedance summing nodes to minimize parasitic shunt capacitance.
For a deeper dive into the transfer function derivations and pole-zero placements, the All About Circuits technical guide on Sallen Key design provides excellent interactive Bode plot visualizations. Mastering this topology bridges the gap between theoretical signal processing and the messy, parasitic reality of physical electronics.
