A multiplexer (MUX) is a combinational digital logic circuit that acts as a multi-position switch, selecting one of several data inputs and forwarding it to a single output line based on binary control signals. When you build a sensor array or a complex control panel, wiring every single switch directly to a microcontroller quickly exhausts your available GPIO pins. This is what multiplexer logic gates change in a real installation: they trade parallel hardware wiring for sequential time-division polling, allowing a single input pin to read dozens of distinct states. Beginners commonly confuse multiplexers with demultiplexers (which take one input and route it to many outputs) or encoders (which compress active lines into a binary code without discrete manual selection).
The Core Mechanics of Multiplexer Logic Gates
Think of a multiplexer like a multi-lane highway merging into a single toll booth; the toll operator (the select pins) decides which lane (data input) gets to pass through to the single exit (the output) at any given millisecond. The fundamental math governing a MUX is the power of two: an N-to-1 multiplexer requires n select lines, where 2n = N.
For an 8-to-1 multiplexer, you need 3 select lines (23 = 8). By toggling these three lines through their binary states (000, 001, 010... up to 111), you sequentially connect each of the 8 input pins to the single output pin. Inside the silicon, this is typically achieved using an array of AND gates feeding into a massive OR gate, or via transmission gates in CMOS logic families.
Worked Numeric Example: Polling 16 Sensors via Cascaded 74HC151s
Let us look at a real-world scenario: you are building a CNC router and need to monitor 16 mechanical limit switches using an ESP32. Wiring 16 switches directly consumes 16 GPIO pins. Instead, we will use two Texas Instruments SN74HC151 8-to-1 multiplexers.
Pin Count Reduction
- Inputs: 16 switches wired to the D0-D7 pins of MUX1 and MUX2.
- Select Lines: 3 ESP32 GPIO pins wired in parallel to the S0, S1, and S2 pins of both MUXes.
- Data Outputs: 2 ESP32 GPIO pins reading the 'Y' output of MUX1 and MUX2.
- Total GPIO Used: 5 pins (3 select + 2 data) instead of 16. You just saved 11 pins for your stepper motor drivers.
Propagation Delay and Timing Math
When polling high-speed signals, propagation delay ($t_{pd}$) matters. According to the All About Circuits digital logic textbook and manufacturer datasheets, the SN74HC151 has a typical $t_{pd}$ of 18 ns at 5V.
If you decide to cascade the chips to save even more pins (feeding the output of MUX1 into an input of MUX2), the signal must pass through two silicon gates. The cumulative delay becomes 36 ns. An ESP32 running at its maximum 240 MHz clock speed executes one cycle every 4.16 ns. Therefore, a 36 ns delay consumes roughly 9 clock cycles. For mechanical limit switches that bounce in the millisecond range, a 9-cycle delay is entirely negligible. However, if you were attempting to multiplex a 10 MHz SPI data bus through these same logic gates, that 36 ns delay would severely skew your clock edges and corrupt the bitstream.
Where You Meet Multiplexers in Practice
You will encounter multiplexers across several distinct hardware categories, and confusing them leads to fried components or clipped signals.
| IC Category | Common Part Numbers | Best Used For | Limitations |
|---|---|---|---|
| Digital Logic MUX | 74HC151, 74HC153 | Routing discrete 0V/5V logic levels, GPIO expansion, address decoding. | Cannot pass analog voltages; clips signals to VCC/GND rails. |
| Analog MUX / Demux | CD4051B, 74HC4051 | Routing audio signals, reading multiple analog sensors with one ADC pin. | Higher on-resistance ($R_{ON}$), susceptible to crosstalk at high frequencies. |
| Bus Multiplexer | TCA9548A | Splitting I2C buses to resolve address collisions between identical sensors. | Specific to I2C protocol; adds capacitance to the bus lines. |
When selecting a part for a mixed-signal bench project, the CD4051B is the undisputed workhorse. Because it uses bidirectional CMOS transmission gates rather than standard unidirectional logic gates, it can pass continuous analog waveforms (like a sine wave from a function generator) straight to an oscilloscope or ADC, provided the signal stays within the VCC and VEE supply rails.
Frequently Asked Questions About Multiplexer Logic Gates
What is the difference between multiplexer logic gates and demultiplexers?
A multiplexer (MUX) takes many inputs and routes one to a single output (Many-to-One), acting as a data selector. A demultiplexer (DEMUX) takes a single input and routes it to one of many outputs (One-to-Many), acting as a data distributor. Physically, many standard logic ICs (like the 74HC138) are marketed as decoders/demultiplexers, while the 74HC151 is strictly a multiplexer. Interestingly, analog switches like the CD4051 are bidirectional and can function as either a MUX or a DEMUX depending on which side of the chip you designate as the source.
Can I route analog audio through a standard 74HC151 multiplexer?
No. The 74HC151 is built with standard digital logic gates designed to interpret voltages strictly as binary HIGH or LOW states. If you feed a 1V peak-to-peak audio sine wave into a 74HC151 powered at 5V, the internal gates will interpret the positive half of the wave as a Logic 1 and the negative half as a Logic 0, resulting in a harsh, clipped square wave at the output. To route analog audio or continuous sensor voltages, you must use an analog multiplexer built with transmission gates, such as the CD4051B or the DG408.
How do I handle unused inputs on a CMOS multiplexer IC?
Always tie unused data inputs (D0-D7) and unused select pins either directly to GND or to VCC using a 10kΩ pull-down/pull-up resistor. If you are using a 74HC151 and only need 5 inputs, tie the remaining 3 inputs to GND to ensure they default to a safe Logic 0 state.
