Active vs Passive Power Supply PFC: Topology Comparison and 300W Design Guide

Power supply PFC (Power Factor Correction) aligns the input current waveform with the input voltage waveform, minimizing reactive power and harmonic distortion. For any switched-mode power supply (SMPS) over 75W, active PFC is legally required in the EU and highly recommended globally to meet IEC 61000-3-2 limits. While passive PFC using simple choke inductors was common in early 2000s desktop PCs, it is largely obsolete for new >100W designs due to severe size, weight, and efficiency penalties. If you are designing a UPS front-end, a 48V solar charge controller, or a high-power battery charger, an active boost PFC stage is your baseline requirement.

Topology Comparison: Active vs Passive Power Supply PFC

Selecting the right PFC topology dictates your BOM cost, thermal management strategy, and EMI filtering requirements. The table below breaks down the four primary topologies used in modern power conversion, highlighting the real-world trade-offs between efficiency, heat, and component count.

For loads between 75W and 300W, Critical Conduction Mode (CrM) is popular due to its zero-voltage switching (ZVS) turn-on, which reduces MOSFET turn-on losses. However, CrM operates at a variable frequency, making EMI filter design difficult because the noise spectrum is spread across a wide band. For loads above 300W, Continuous Conduction Mode (CCM) is the industry standard. CCM maintains a fixed switching frequency (typically 65kHz to 100kHz), allowing for optimized, narrow-band EMI filtering and significantly lower peak inductor currents, which reduces I²R copper losses.

Linear vs Switching Loads and Input Protection Requirements

A common question on the bench is whether PFC is needed for linear versus switching loads. The answer depends entirely on the input stage of the load.

When PFC is Mandatory vs Unnecessary

True linear loads—such as resistive heating elements, incandescent lamps, or linear transformers without rectifier-capacitor banks—draw current that is naturally proportional to the applied sinusoidal voltage. These loads inherently possess a power factor near 1.0 and do not require PFC.

However, almost all modern high-power equipment uses a switching architecture with a capacitive input filter. Without PFC, the bulk capacitor only charges when the rectified AC voltage exceeds the capacitor's stored voltage. This results in massive, narrow current spikes drawn at the peaks of the voltage waveform, yielding a terrible power factor of 0.5 to 0.6 and generating severe odd-order harmonics. If your load is a battery charger, an inverter DC bus, or an SMPS, power supply PFC is mandatory to prevent upstream transformer overheating and neutral wire overloading.

Input Range and Protection Circuitry

A universal input PFC stage must operate from 85 VAC to 264 VAC. This wide range introduces severe stress during fault conditions and power-up. Your input protection network must follow this specific sequence:

1. Fuse: Placed first. Use a time-delay, flame-proof fuse rated for at least 1.5x the maximum RMS input current (e.g., an 8A fuse for a 300W supply at 85VAC).
2. MOV (Metal Oxide Varistor): Placed after the fuse. Use a 275 VAC rated MOV (e.g., Littelfuse TMOV20RP275E). Never place an MOV before the fuse without a thermal disconnect; if the MOV fails short during a massive surge, it will catch fire.
3. NTC Thermistor: Placed after the bridge rectifier to limit inrush current into the bulk capacitor. An Ametherm SL32 2R008 (2 ohms cold) is typical for 300W. For higher efficiency, bypass the NTC with a relay after the capacitors charge.

300W Active PFC Design Example: Specs, Parts, and Thermal Derating

Let us spec out a 300W Continuous Conduction Mode (CCM) power supply PFC stage targeting a 48V battery charging application. The target output is 390 VDC to provide adequate headroom for the downstream phase-shifted full-bridge DC-DC converter.

Thermal Management and Derating Note

Thermal design in a PFC stage is dominated by the boost MOSFET and the boost diode. By selecting a Silicon Carbide (SiC) diode, we eliminate the reverse recovery charge (Qrr) that plagues standard silicon ultra-fast diodes, effectively removing the diode's switching losses and the MOSFET's associated turn-on spike losses.

At full load (300W) and high line (230 VAC), the UCC28180 switches at 65kHz. The IPA60R120P7 MOSFET will dissipate approximately 2.8W of combined conduction and switching loss. Assuming a maximum ambient temperature of 50°C inside the power supply enclosure, and a maximum allowable junction temperature of 110°C for reliability, the maximum allowable thermal resistance from junction to ambient (RθJA) is:

RθJA = (Tj_max - Ta) / P_diss = (110 - 50) / 2.8 = 21.4 °C/W

Since the bare TO-220 package has an RθJA of roughly 62 °C/W, a heatsink is mandatory. A small extruded aluminum heatsink with a thermal resistance of 12 °C/W will keep the MOSFET junction comfortably around 83°C. Derating rule: If your application requires operation in a 60°C ambient environment (e.g., an enclosed solar inverter cabinet), you must derate the maximum continuous output power by 20%, limiting the supply to 240W to maintain the same thermal margins.

Ripple, Noise, and Output Expectations

A common misconception among junior engineers is that the output of a PFC stage is pure, clean DC. It is not. The output of a single-phase power supply PFC stage is a high-voltage DC bus with a significant low-frequency AC ripple superimposed on it. Because the instantaneous input power from the AC grid drops to zero twice per cycle (at 100Hz for 50Hz grids, or 120Hz for 60Hz grids), the bulk capacitor must supply the load during those zero-crossings.

Calculating the 120Hz Ripple

The peak-to-peak voltage ripple on the PFC bulk capacitor is calculated using the following formula:

V_ripple = P_out / (2 * π * f_line * C_bulk * V_out)

For our 300W design operating on a 60Hz grid (120Hz ripple frequency) with a 100µF bulk capacitor and a 390VDC output:

V_ripple = 300 / (2 * 3.1415 * 120 * 0.0001 * 390) = 10.2V peak-to-peak

This means your 390V bus is actually swinging between 385V and 395V at 120Hz. This is entirely normal and expected. The downstream DC-DC converter (e.g., an LLC resonant converter or a phase-shifted full bridge) must be designed with a Power Supply Rejection Ratio (PSRR) of at least 40dB at 120Hz to prevent this low-frequency ripple from modulating the final 48V battery charging output.

High-Frequency Switching Noise

While the 120Hz ripple is a low-frequency bulk phenomenon, the 65kHz switching of the MOSFET generates high-frequency common-mode and differential-mode noise. To meet FCC Part 15 Class B or CISPR 32 conducted emissions limits, your input EMI filter must include:

• X-Capacitors: Placed across Line and Neutral to filter differential noise. A 0.47µF X2 capacitor is typical for 300W.
• Common Mode Chokes (CMC): A dual-stage CMC (e.g., 10mH followed by 2mH) is required to attenuate common-mode noise generated by the high dV/dt of the MOSFET drain node coupling through parasitic capacitance to the chassis ground.
• Y-Capacitors: Placed from Line/Neutral to Earth Ground. Keep these values below 4.7nF total to limit earth leakage current to < 3.5mA for medical or stringent IT applications.

Designing a robust power supply PFC stage requires balancing the low-frequency bulk energy storage against high-frequency switching losses. By selecting CCM topology for loads over 300W, utilizing SiC diodes to eliminate reverse recovery heat, and properly calculating your bulk capacitance for 120Hz ride-through, you ensure a highly efficient, grid-compliant front end for any high-power DC system.