The XNOR boolean expression defines a logic operation that outputs a HIGH (1) state if and only if all of its inputs share the exact same logic level, making it the fundamental building block for digital equality detection. When you are debugging a digital bus, designing a parity checker, or routing signals on a PCB, recognizing this equivalence function is what separates a working prototype from a floating-node nightmare. Unlike basic AND/OR gates, the XNOR (Exclusive-NOR) gate evaluates the relationship between inputs rather than just their presence.
The Core XNOR Boolean Expression and Truth Table
In boolean algebra, the XNOR operation is the logical complement of the XOR (Exclusive-OR) operation. It is formally written using the Sum of Products (SOP) format as:
Y = AB + A'B' (or Y = AB + AB)
This expression reads: "The output Y is HIGH if (A AND B are both HIGH) OR (A AND B are both LOW)." You will also frequently see it written using the XOR symbol with an overbar: Y = A ⊕ B.
To understand how this translates to physical voltage on a workbench, let's look at a standard 5V CMOS logic truth table. In 5V logic, a nominal 5.0V represents a logic HIGH (1), and 0.0V represents a logic LOW (0).
| Input A (Voltage) | Input B (Voltage) | Boolean A | Boolean B | Output Y (Boolean) | Output Y (Voltage) |
|---|---|---|---|---|---|
| 0.0V | 0.0V | 0 | 0 | 1 | 5.0V |
| 0.0V | 5.0V | 0 | 1 | 0 | 0.0V |
| 5.0V | 0.0V | 1 | 0 | 0 | 0.0V |
| 5.0V | 5.0V | 1 | 1 | 1 | 5.0V |
Worked Numeric Example: 2-Bit Equivalence Lock with the CD4077
Let's build a practical circuit: a 2-bit electronic access lock. We want a relay to trigger only when a user's 2-bit DIP switch input exactly matches a hidden 2-bit master code.
Components:
- 1x 74HC08 (Quad 2-Input AND IC)
- 2x 2-position DIP switches
- 1x 5V relay module
Wiring and Logic Flow:
- Master Code Setup: Hardwire Master Bit 1 (M1) to 5V (HIGH) and Master Bit 2 (M2) to 0V (LOW).
- User Input: Connect User Bit 1 (U1) and User Bit 2 (U2) to the DIP switches, pulling them to 5V when closed and 0V when open.
- XNOR Stage: Feed M1 and U1 into the first XNOR gate (Gate A). Feed M2 and U2 into the second XNOR gate (Gate B).
- AND Stage: Feed the outputs of Gate A and Gate B into the 74HC08 AND gate.
Numeric Execution:
If the user sets U1 = 5V and U2 = 5V:
Gate A compares M1 (5V) and U1 (5V) → Output is 5V (HIGH).
Gate B compares M2 (0V) and U2 (5V) → Output is 0V (LOW).
The AND gate receives (HIGH, LOW) → Final output is 0V. The relay stays off.
If the user sets U1 = 5V and U2 = 0V:
Gate A compares (5V, 5V) → Output is 5V.
Gate B compares (0V, 0V) → Output is 5V.
The AND gate receives (HIGH, HIGH) → Final output is 5V. The relay triggers.
If you substitute the CD4077 with a 74-series XNOR like the 74HC266, your circuit will fail unless you modify it. The 74HC266 features open-drain outputs. It can pull the line to 0V, but it cannot source 5V. You must add 10kΩ pull-up resistors from the XNOR output pins to the 5V VCC rail. If you skip this, the output will float when it should be HIGH, the AND gate will read an indeterminate voltage (~2.2V), and your relay will chatter unpredictably.
Where You Meet XNOR Logic in Practice
You won't just find XNOR gates in textbook exercises; they are critical in specific hardware architectures where state-matching is required.
- Parity Checkers in Serial Data: In RS-232 or UART communication, an XNOR tree is used to verify even/odd parity. If the transmitted parity bit and the calculated local parity bit match, the XNOR outputs a HIGH, signaling a valid frame.
- Digital Magnitude Comparators: ICs like the 74HC85 use internal XNOR gates to cascade equality checks across 4-bit or 8-bit buses, determining if Bus A exactly equals Bus B.
- Phase Detectors in PLLs: In a Phase-Locked Loop (like the CD4046B), Phase Comparator I is literally a single XNOR gate. What it changes in a real circuit: Swapping an XOR for an XNOR in a PLL phase detector inverts the phase error voltage polarity. If you use the wrong logic gate here, the Voltage Controlled Oscillator (VCO) will drive to the opposite supply rail and fail to lock onto the target frequency.
XNOR vs. NOR: The Most Common Bench Confusion
The most frequent mistake hobbyists and junior technicians make is confusing the XNOR gate with the NOR gate because of the similar names and the "bubble" (inversion circle) on the logic symbol.
| Feature | NOR Gate (NOT OR) | XNOR Gate (Exclusive-NOR) |
|---|---|---|
| Boolean Expression | Y = A + B | Y = AB + A'B' |
| Outputs HIGH when... | Both inputs are LOW (0,0) | Inputs are identical (0,0 or 1,1) |
| Outputs LOW when... | Any input is HIGH (0,1 / 1,0 / 1,1) | Inputs differ (0,1 or 1,0) |
| Primary Use Case | Active-low enable lines, reset circuits | Equality detection, parity checking |
Visual Identification: On a schematic, a NOR gate has a straight back and a curved front with a bubble at the output. An XNOR gate has two curved lines at the input (the exclusive marker) and a bubble at the output. If you miss that second input curve, you will wire the wrong IC into your board.
Frequently Asked Questions
What is the boolean algebra simplification for an XNOR gate?
The XNOR expression Y = A ⊕ B expands to Y = AB' + A'B. Using De Morgan's Laws, this simplifies to the Sum of Products form: Y = (A' + B)(A + B'), which further reduces to the standard SOP expression: Y = AB + A'B'. There is no simpler two-term reduction; it inherently requires two AND operations and one OR operation to resolve in standard logic.
Why do some XNOR ICs like the 74HC266 require pull-up resistors?
The 74HC266 was designed with open-drain (or open-collector in TTL versions like the 74LS266) outputs specifically to allow wired-AND configurations on a shared bus. Because the internal output transistor only connects the pin to ground (LOW) or disconnects it (High-Z), it cannot actively drive the line HIGH. An external pull-up resistor (typically 4.7kΩ to 10kΩ) is required to pull the voltage up to VCC when the transistor is off.
How does an XNOR gate function as a controlled inverter?
If you tie one input of an XNOR gate to a control signal and feed your data into the other, it acts as a programmable inverter. If the control input is LOW (0), the XNOR passes the data signal unchanged (0⊕0=1, 1⊕0=0 wait, XNOR: 0,0=1; 1,0=0. So data passes through). If the control input is HIGH (1), the XNOR inverts the data signal (0,1=0; 1,1=1. Wait, XNOR: 0,1=0; 1,1=1. Let's re-verify: Data=0, Control=1 -> Output=0. Data=1, Control=1 -> Output=1. This is a buffer. Let's correct this: XOR is the controlled inverter. XNOR is a controlled buffer/inverter depending on the tie. Let me state it accurately.
Correction for accuracy: An XOR gate is typically used as a controlled inverter (Control=1 inverts, Control=0 passes). An XNOR gate acts as a controlled true/complement generator. If you tie one input to HIGH (1), the XNOR output exactly follows the other input (it acts as a non-inverting buffer). If you tie one input to LOW (0), the XNOR output inverts the other input. This is heavily used in programmable logic arrays where a single pin dictates whether a signal path is inverted or buffered.
Can I build an XNOR gate using only NAND gates?
Yes, but it is not efficient. Because NAND gates are universal, you can construct an XNOR function entirely out of them, but it requires exactly five 2-input NAND gates to replicate a single XNOR gate. In a practical PCB layout or breadboard build, you should always use a dedicated XNOR IC (like the CD4077 or 74HC266) to save board space, reduce propagation delay, and minimize power consumption.
