How to Write XOR in Boolean Algebra: Truth Tables, Circuits, and IC Equivalents

XOR (Exclusive OR) is a digital logic operation that outputs a HIGH (1) state only when its inputs differ. To write XOR in Boolean algebra, you use the direct exclusive-OR symbol Y = A ⊕ B, or its expanded sum-of-products canonical form Y = A'B + AB' (also written as Y = ĀB + AB̄). Unlike standard logic gates that evaluate parallel conditions, XOR acts as a difference detector, forming the mathematical backbone of binary arithmetic and error-checking circuits.

The Boolean Math and Truth Table

When designing logic circuits or writing Hardware Description Language (HDL) code for FPGAs, you will encounter two ways to express XOR. The ⊕ symbol is used for high-level behavioral modeling, while the expanded A'B + AB' form is used when you need to synthesize the gate using universal NAND or NOR gates. Think of a hallway light controlled by two 3-way switches at opposite ends; the light toggles state whenever either switch is flipped, meaning the output (light on) depends entirely on the switches being in different physical positions.

Below is the definitive truth table comparing XOR against standard Inclusive OR and XNOR. This table is the first thing you should reference when debugging a logic analyzer trace.

Worked Numeric Example: 4-Bit Parity Generation

To see how XOR functions with real values, let us calculate an Even Parity bit for a 4-bit data nibble. Parity generators are used in RAM ECC (Error-Correcting Code) and UART serial transmission to detect single-bit flips. The Boolean equation for a 4-bit even parity generator is:

P = D₀ ⊕ D₁ ⊕ D₂ ⊕ D₃

Assume our data nibble is 1011 (Hex 0xB). We want to append a parity bit so the total number of 1s in the transmitted 5-bit word is even.

If a single bit flips during transmission (e.g., the receiver reads 10011), the receiver runs the exact same XOR chain across all 5 bits. The result will be 1 instead of 0, flagging a parity error. This cascading property—where A ⊕ B ⊕ C evaluates left-to-right without needing parentheses—is unique to XOR and makes it incredibly efficient for silicon implementation.

Where You Meet XOR in Practice (and What It Changes)

When you swap an OR gate for an XOR gate on your breadboard, it changes a standard parallel logic evaluation into a modulo-2 adder or a difference detector. In a microcontroller's Arithmetic Logic Unit (ALU), an OR gate performs a bitwise logical merge (useful for setting flag registers), while an XOR gate performs the actual binary sum (ignoring the carry bit).

Here is where you will physically encounter XOR logic in modern electronics:

• Quadrature Encoders: When reading a rotary encoder with an ESP32 or Arduino, XOR gates are used in hardware phase detectors to determine motor direction. If Channel A and Channel B are evaluated via XOR, the output edge timing reveals whether the shaft is spinning clockwise or counter-clockwise.
• Phase-Locked Loops (PLLs): In RF and clock-recovery circuits (like the classic CD4046B), the Phase Comparator II block relies heavily on XOR logic to generate a voltage proportional to the phase difference between a reference oscillator and a VCO.
• Controlled Inverters: If you tie one input of an XOR gate to a control signal, the gate acts as a programmable inverter. When the control pin is LOW, the output mirrors the input (A ⊕ 0 = A). When the control pin is HIGH, the output inverts the input (A ⊕ 1 = A'). This is heavily used in ALU subtraction circuits to flip bits before adding a carry-in.

Common Confusions and Silicon Equivalents

The most common mistake bench hobbyists make is confusing XOR with Inclusive OR. Inclusive OR (the | operator in C++) outputs a 1 if any input is 1, including when both are 1. XOR strictly rejects the 1+1 state. A secondary confusion is mixing up XOR with XNOR, which is simply an XOR gate with an inverter on the output (an equality detector).

When sourcing physical ICs for your logic trainer or custom PCB, you must match the logic family to your microcontroller's voltage levels. According to the Texas Instruments SN74HC86 datasheet, mixing up the 'HC' and 'HCT' prefixes will result in unreliable logic thresholds when interfacing with 5V TTL systems.

Standard 14-pin DIP Pinout Note: For all quad 2-input XOR ICs listed above, Pin 14 is VCC, Pin 7 is GND. The four gates are mapped as: Gate 1 (Pins 1,2 → 3), Gate 2 (Pins 4,5 → 6), Gate 3 (Pins 9,10 → 8), and Gate 4 (Pins 12,13 → 11).

Frequently Asked Questions

Can I write XOR using only NAND gates?
Yes. Because NAND is a universal gate, you can construct the expanded Boolean form (A'B + AB') using exactly four NAND gates. This is a standard university lab exercise and is how XOR is physically mapped inside the Look-Up Tables (LUTs) of modern FPGAs.

Why does my C++ code use ^ for XOR instead of ⊕?
The ⊕ symbol is strictly for mathematical Boolean algebra and schematic documentation. Programming languages like C, Python, and Verilog use the caret ^ as the bitwise XOR operator. Do not confuse this with the exponentiation operator used in Python (**).

What happens if I leave an XOR input floating?
In CMOS ICs (like the 74HC86 or CD4030), a floating input will drift into the linear region of the internal MOSFETs. This causes the gate to draw excessive quiescent current, overheating the chip and causing the output to oscillate wildly. Always tie unused XOR inputs to GND or VCC via a 10kΩ pull-down/pull-up resistor.