Definition: A Widlar current source is a two-transistor circuit that uses an emitter degeneration resistor on the output device to generate a highly stable, low-magnitude output current from a much larger reference current.

What this topology fundamentally changes in circuit design is the ability to generate microamp-level bias currents without requiring impractically large resistors or mismatched transistor geometries. In a standard basic current mirror, the output current is forced to equal the reference current. If you need a 10 µA bias current from a 10V supply using a basic mirror, you must place a 1 MΩ resistor in the reference leg. On a silicon integrated circuit, a 1 MΩ resistor consumes massive die area; on a discrete breadboard, 1 MΩ resistors are highly susceptible to noise and leakage. The Widlar current source topology solves this by allowing a 1 mA reference current to be mathematically scaled down to 10 µA using standard, low-value resistors and identically sized transistors.

The most common confusion with this circuit is mixing it up with a Wilson current mirror. While a Wilson mirror adds a third transistor to drastically increase output impedance and reduce Early effect errors, it does not inherently scale the current ratio. The Widlar modification is specifically about current scaling via the $V_{BE}$ mismatch, whereas the Wilson modification is about output impedance enhancement.

The Core Mechanism: Scaling Current Without Giant Resistors

In a basic BJT current mirror, two identical transistors share the same base-emitter voltage ($V_{BE}$), forcing their collector currents to be equal. The Widlar modification breaks this symmetry intentionally. By inserting a resistor ($R_E$) in the emitter of the output transistor ($Q_2$), the base-emitter voltage of $Q_2$ is forced to be lower than that of the diode-connected reference transistor ($Q_1$).

The voltage dropped across $R_E$ is exactly equal to the difference in $V_{BE}$ between the two transistors. Because the bipolar transistor's collector current relates exponentially to its $V_{BE}$, a very small difference in $V_{BE}$ (typically between 50 mV and 150 mV) corresponds to a massive logarithmic ratio in current. This allows $Q_2$ to pass a tiny fraction of $Q_1$'s current while keeping $R_E$ in the practical 5 kΩ to 50 kΩ range.

Worked Numeric Example: Designing a 10 µA Source

Let’s design a discrete Widlar source to generate exactly 10 µA ($I_{out}$) from a 1 mA reference current ($I_{ref}$). We will assume an ambient temperature of 27°C (300K), which gives a thermal voltage ($V_T$) of approximately 25.85 mV. We also assume $Q_1$ and $Q_2$ are perfectly matched (identical saturation currents, $I_S$).

The governing equation for the Widlar emitter resistor is:

$$I_{out} \times R_E = V_T \times \ln\left(\frac{I_{ref}}{I_{out}}\right)$$

  1. Calculate the $V_{BE}$ delta: $\Delta V_{BE} = 25.85\text{ mV} \times \ln(1\text{ mA} / 10\text{ \mu A})$
  2. Solve the natural log: $\ln(100) \approx 4.605$
  3. Multiply by $V_T$: $25.85\text{ mV} \times 4.605 = 119.04\text{ mV}$
  4. Solve for $R_E$: $R_E = 119.04\text{ mV} / 10\text{ \mu A} = 11,904\text{ \Omega}$
Target Value: 11.9 kΩ. Using a standard E96 1% tolerance resistor of 11.8 kΩ will yield an actual output current of 10.08 µA, which is well within acceptable bias tolerances for analog stages.

Notice that to get a 100:1 current reduction, we only needed an 11.8 kΩ resistor. If we had used a basic mirror to get 10 µA from a 10V rail, we would have needed a 1 MΩ reference resistor. The Widlar topology saves silicon area in ICs and avoids high-impedance noise pickup in discrete builds.

Where You Meet the Widlar Current Source in Practice

You interact with this circuit every time you use a classic operational amplifier. The most famous implementation is inside the LM741 op-amp. The input differential pair of the 741 requires a highly stable tail current of roughly 19 µA to set its transconductance and slew rate.

Inside the 741 die, transistors Q10 and Q11 form a Widlar source. Q11 is diode-connected and fed by the main bias network (providing roughly 730 µA). Q10 has a 5 kΩ resistor in its emitter. If we run the math: $26\text{ mV} \times \ln(730\text{ \mu A} / I_{out}) = I_{out} \times 5\text{ k\Omega}$. Solving this iteratively yields an $I_{out}$ of approximately 18.9 µA. This precise microamp tail current is what gives the 741 its predictable input bias characteristics.

In modern discrete designs, you will use this topology when biasing high-impedance sensors. For example, biasing a photodiode in photoconductive mode or setting the quiescent current for a low-power piezo preamplifier often requires exactly 5 µA to 20 µA. A Widlar source powered by a low-noise LDO provides a vastly cleaner, lower-impedance bias point than a simple high-value resistor tied to the positive rail.

Decision Tree: Which Current Mirror Topology to Pick

Choosing the right current mirror depends on your headroom, scaling needs, and output impedance requirements. Use this matrix to terminate your design choice.

Topology Current Scaling Output Impedance Voltage Headroom Required Best Use Case
Basic Mirror 1:1 only Low ($r_o$) Low ($V_{CE(sat)}$) Simple level shifting, matched 1:1 biasing where Early effect is negligible.
Widlar Source High (10:1 to 1000:1) Medium (boosted by $R_E$) Medium ($V_{CE(sat)} + I_{out}R_E$) Generating microamp bias currents from milliamp references.
Wilson Mirror 1:1 only Very High ($\beta r_o / 2$) High ($2 \times V_{BE}$) Active loads in high-gain amplifier stages where output impedance dictates gain.
Cascode Mirror 1:1 (or scaled) Extremely High ($g_m r_o^2$) Very High ($V_{CE(sat)} + V_{BE}$) Precision current sources in low-voltage IC design (using wide-swing variants).
Default Pick: If your requirement is $I_{out} < 100\text{ \mu A}$ derived from a $>1\text{ mA}$ reference on a standard 5V or 12V rail, use the Widlar topology. Do not attempt to use a basic mirror with a massive reference resistor, and do not waste the voltage headroom of a Wilson mirror when current scaling is your primary goal.

Practical Build Notes and Discrete Failure Modes

When moving this circuit from SPICE simulation to a physical breadboard or PCB, the assumption that $Q_1$ and $Q_2$ are perfectly matched falls apart. The governing equation actually includes the mismatch in base-emitter voltages ($\Delta V_{BE(mismatch)}$):

$$I_{out} \times R_E = V_T \times \ln\left(\frac{I_{ref}}{I_{out}}\right) \pm \Delta V_{BE(mismatch)}$$

If you use two random 2N3904 transistors from different manufacturing batches, their $V_{BE}$ might differ by 5 mV to 10 mV at the same current. In our 10 µA design, a mere 2 mV mismatch translates to a current error of $2\text{ mV} / 11.8\text{ k\Omega} = 169\text{ nA}$. While 169 nA sounds small, it represents a 1.6% error on a 10 µA source. If you are biasing a sensitive transimpedance amplifier, this error will manifest as a massive DC offset at the output.

The Fix: Never use discrete, single-packaged transistors for a precision Widlar source. Always use a monolithic dual matched transistor pair like the BCM847 matched dual NPN or the MAT12. Because both dies are fabricated on the same silicon substrate, their $V_{BE}$ mismatch is typically guaranteed to be less than 1 mV, and their thermal coupling is practically perfect.

Thermal Runaway Risk: The output transistor ($Q_2$) in a Widlar source has a negative temperature coefficient regarding its $V_{BE}$. As $Q_2$ heats up, its $V_{BE}$ drops, which forces more voltage across $R_E$, increasing $I_{out}$, which causes more heating. Because $I_{out}$ is in the microamp range, self-heating is rarely an issue. However, if $Q_2$ is placed near a hot power transistor on the PCB, the ambient heat will shift your bias current. Keep the matched pair thermally isolated from heat sinks and power stages.

Frequently Asked Questions

Can I use MOSFETs instead of BJTs for a Widlar current source?

Yes, but the math changes entirely. BJTs rely on the exponential Shockley diode equation, meaning a tiny $\Delta V_{BE}$ creates a massive current ratio. MOSFETs operate on a square-law (in saturation) or linear (in subthreshold) relationship. To get a 100:1 current scaling with MOSFETs, you typically just scale the $W/L$ (width-to-length) ratio of the transistor geometries on the silicon die rather than using a source degeneration resistor. In discrete MOSFET designs, matching $V_{GS(th)}$ is notoriously poor, making discrete MOSFET Widlar-style sources highly inaccurate.

Does the Early effect ruin the output impedance of a Widlar source?

Actually, the emitter resistor $R_E$ improves the output impedance compared to a basic mirror. The output impedance of a Widlar source is approximately $R_{out} \approx r_o \times (1 + g_m R_E)$, where $r_o$ is the transistor's intrinsic Early resistance. The local negative feedback provided by $R_E$ makes the output current much stiffer against changes in the output voltage ($V_{CE}$ of $Q_2$) than a basic diode-connected mirror.

What happens if my reference current ($I_{ref}$) drifts?

The Widlar source is a ratio-based circuit, not an absolute regulator. If your reference current drifts by 5% due to supply voltage ripple or a drifting reference resistor, your output microamp current will also drift by roughly 5%. For absolute precision, $I_{ref}$ must be generated by a dedicated bandgap reference IC or a precision voltage reference driving a stable resistor, rather than just a simple resistor tied to an unregulated $V_{CC}$ rail.