The Short Answer: What Is an LDO and How Does It Work?

An LDO (Low Dropout Regulator) is a type of linear voltage regulator designed to maintain a stable output voltage even when the input voltage is very close to the desired output. While a standard linear regulator like the classic LM317 requires 2V to 3V of headroom (the difference between input and output) to function, a modern LDO can regulate with as little as 100mV to 300mV of headroom.

The secret lies in the internal pass transistor topology. Standard linear regulators use an NPN bipolar transistor or a Darlington pair, which inherently suffer from high base-emitter voltage drops. LDOs use a PNP bipolar transistor or a PMOS FET as the pass element. A PMOS-based LDO, in particular, acts like a voltage-controlled resistor; its on-resistance (RDS(on)) is so low that the voltage drop across it is minimal, allowing the input voltage to sit just millivolts above the output rail while still maintaining regulation.

According to the Texas Instruments LDO Basics Primer, the core function of the LDO's error amplifier is to continuously compare a divided-down fraction of the output voltage against an internal bandgap reference, adjusting the gate or base drive of the pass element to keep the output locked. This continuous linear dissipation is what makes thermal management the primary constraint in LDO design.

LDO vs. Switching Regulator: The Topology Showdown

The most common bench debate is linear vs. switching for a given load. Switching regulators (buck converters) use inductors and capacitors to transfer energy in discrete packets, achieving high efficiency but generating electromagnetic interference (EMI). LDOs simply burn excess voltage as heat. Here is how they compare across a 5V-to-3.3V conversion at a 500mA load:

Criterion LDO (e.g., AMS1117-3.3) Switching Buck (e.g., MP2359)
Efficiency 66% (VOUT / VIN) 88% - 94%
Heat Dissipation 0.85W (Burns 1.7V × 0.5A) ~0.08W (Most energy transferred)
Output Noise / Ripple Extremely low (µV range) High (mV range, switching harmonics)
Component Cost & BOM $0.15 (IC + 2 caps) $1.20+ (IC, inductor, diode, caps)
Board Space Very small (SOT-23 / SOT-223) Larger (Inductor footprint dominates)

When to choose an LDO: Use an LDO when your load current is low (typically under 300mA), the voltage differential is small (e.g., 3.6V Li-Ion down to 3.3V), or your circuit is highly sensitive to noise (RF transceivers, precision ADCs, audio DACs).

When to choose a Switcher: Use a buck converter when stepping down large voltages (12V to 3.3V), when load currents exceed 500mA, or when operating from a battery where the 34% efficiency loss of an LDO would destroy your runtime.

Design Example: Sizing an LDO for a 3.3V ESP32 Rail

Let us design a 5V USB-to-3.3V rail for an ESP32-WROOM-32 module. The ESP32 can draw baseline currents of 80mA, but transmission spikes can hit 450mA–500mA. We will target a 500mA maximum load.

1. Dropout and Headroom Math

We select the AMS1117-3.3 in a SOT-223 package. According to its datasheet, the maximum dropout voltage (VDO) is 1.1V at 1A. At our 500mA peak, VDO is approximately 0.5V.

  • Headroom Available: 5.0V (USB) - 3.3V (Target) = 1.7V
  • Headroom Required: 0.5V

Since 1.7V > 0.5V, the regulator will easily maintain 3.3V. However, if your USB port sags to 4.0V (a common brownout scenario), your headroom drops to 0.7V. You are still above the 0.5V dropout threshold, but you are approaching the margin of error. If your input source is noisy or prone to sagging, a true low-dropout part like the AP2112K-3.3 (VDO = 250mV at 600mA) provides a much safer margin.

2. The Thermal Trap: Package Derating

Power dissipation (PD) is calculated as: PD = (VIN - VOUT) × ILOAD.
PD = (5.0V - 3.3V) × 0.5A = 0.85W.

WARNING: The SOT-23 Thermal Trap
Many hobbyists blindly select an LDO based on its current rating without checking the package thermal resistance (θJA). A standard SOT-23-5 package has a θJA of roughly 250°C/W. Dissipating 0.85W in a SOT-23 results in a temperature rise of 212°C above ambient. The silicon will hit its 150°C thermal shutdown limit almost instantly, causing your ESP32 to brownout and reset during WiFi transmission.

The Fix: Use a SOT-223 package (like the AMS1117). With a proper PCB copper pour, the SOT-223 θJA drops to ~62°C/W. The temperature rise becomes 52.7°C (0.85W × 62°C/W). At a 25°C room, the junction sits at a safe 77.7°C.

3. Input Range, Protection, and Capacitor ESR

An LDO requires input and output capacitors for transient response and loop stability. Older LDO architectures (including some legacy 1117 variants) require a high-ESR (Equivalent Series Resistance) output capacitor—typically a tantalum cap—to introduce a zero in the feedback loop and prevent oscillation. Using a low-ESR ceramic (MLCC) cap with these older parts will cause high-frequency ringing and output instability.

Modern LDOs (like the Microchip MCP1700 or Diodes AP2112) are internally compensated and explicitly designed for low-ESR X7R ceramic capacitors. Always check the manufacturer's datasheet for the specific ESR requirement. For protection, if the input source is a battery or an exposed barrel jack, add a reverse-polarity P-MOSFET on the input rail; an LDO will permanently short-circuit and destroy itself if reverse voltage is applied.

Ripple, Noise, and PSRR Expectations

A common misconception is that an LDO magically eliminates all upstream noise. While an LDO generates virtually no switching noise of its own, its ability to block incoming noise is defined by its Power Supply Rejection Ratio (PSRR).

PSRR is measured in decibels (dB) and varies wildly with frequency. A typical LDO might boast a PSRR of -70dB at 100Hz, meaning it attenuates low-frequency input ripple by a factor of 3,162. However, as frequency increases into the MHz range (where switching regulators operate), the LDO's internal error amplifier runs out of bandwidth, and PSRR can degrade to -20dB or worse. At high frequencies, the LDO's output capacitor's ESR and ESL (Equivalent Series Inductance) do the heavy lifting, not the active silicon.

Practical Rule: If you are using an LDO as a post-regulator to clean up the noisy output of a switching buck converter (a very common topology in mixed-signal designs), the LDO will easily strip the low-frequency sawtooth ripple. But to block the high-frequency switching harmonics, you must place a small ferrite bead or an RC low-pass filter between the buck output and the LDO input.

Frequently Asked Questions

What is an LDO used for in battery-powered devices?

In battery-powered designs, an LDO is primarily used to maximize the usable life of the cell by operating with minimal headroom. For example, a single Li-Ion cell discharges from 4.2V down to 2.8V. If your microcontroller runs at 3.0V, a standard linear regulator will drop out of regulation when the battery hits 4.5V (which it never does) or require a boost converter. A high-performance LDO with a 150mV dropout can continue regulating 3.0V all the way down to a battery voltage of 3.15V, squeezing an extra 15% to 20% of runtime out of the cell before the system powers down.

What is the difference between an LDO and a standard linear regulator?

The difference is purely architectural, dictating the minimum required voltage differential (dropout voltage). A standard linear regulator, like the LM7805, uses an NPN pass transistor that requires base drive current and suffers from a VCE(sat) drop, typically needing 2V to 2.5V of headroom. An LDO uses a PMOS or PNP pass element. A PMOS LDO is driven by voltage rather than current, and its on-resistance is exceptionally low, allowing the input voltage to sit just millivolts above the output voltage while still maintaining a regulated state.

What is LDO quiescent current and why does it matter?

Quiescent current (IQ) is the current the LDO's internal circuitry (error amplifier, bandgap reference, bias networks) consumes to keep itself running, independent of the load current. In a high-power desktop circuit, an IQ of 5mA is irrelevant. However, in a remote IoT sensor drawing 10µA in sleep mode, an LDO with a 5mA IQ will drain your battery in weeks, completely ruining the sleep-state power budget. For battery IoT nodes, you must select 'nano-power' LDOs (like the TI TPS782 or Microchip MCP1700) that feature an IQ under 2µA.