What Is a Half Adder? Digital Logic Basics and Circuit Examples

A half adder is a combinational digital logic circuit that adds two single-bit binary inputs to produce a two-bit output consisting of a Sum and a Carry. In a physical circuit or breadboard layout, it changes two independent, parallel boolean voltage states into a mathematically valid binary sum, routing electrical signals through logic gates to resolve arithmetic operations without requiring a clock signal.

While you will rarely wire discrete half adders to build a calculator in 2026, understanding this circuit is mandatory for anyone debugging FPGA code, designing custom ASICs, or troubleshooting the Arithmetic Logic Unit (ALU) inside a microcontroller. Below, we break down the boolean math, build one on a breadboard with real 5V logic ICs, and clarify the most common points of confusion.

The Core Logic: Truth Tables and Boolean Math

A half adder relies on two fundamental logic gates to perform binary addition: an XOR (Exclusive-OR) gate for the Sum output, and an AND gate for the Carry output. The inputs are typically labeled A and B.

• Sum (S): Calculated as A ⊕ B (A XOR B). The output is HIGH only when the inputs are different.
• Carry (C): Calculated as A · B (A AND B). The output is HIGH only when both inputs are HIGH.

Worked Numeric Example: Breadboarding with 5V 74HC Logic

To see what a half adder does in a real installation, let us build one using standard through-hole CMOS logic ICs on a breadboard. We will use a Texas Instruments SN74HC86 (Quad 2-Input XOR) and a 74HC08 (Quad 2-Input AND). Both are powered by a 5.0V bench supply.

The Setup:

1. Connect VCC (Pin 14) to the 5.0V positive rail and GND (Pin 7) to the ground rail on both ICs.
2. Wire Input A to Pin 1 and Input B to Pin 2 of the 74HC86 (XOR gate).
3. Wire Input A to Pin 1 and Input B to Pin 2 of the 74HC08 (AND gate).
4. Connect an LED with a 330Ω current-limiting resistor to the XOR output (Pin 3) to represent the Sum.
5. Connect an LED with a 330Ω resistor to the AND output (Pin 3) to represent the Carry.

The Test (Adding 1 + 1):

We apply 5.0V (Logic 1) to Input A and 5.0V (Logic 1) to Input B. Mathematically, we are adding binary 1 and binary 1, which equals decimal 2 (binary 10).

• XOR Gate (Sum): Because both inputs are identical (HIGH/HIGH), the XOR gate outputs 0.05V (Logic 0). The Sum LED remains OFF.
• AND Gate (Carry): Because both inputs are HIGH, the AND gate outputs 4.95V (Logic 1). The Carry LED turns ON.

Reading the outputs as a binary pair (Carry, Sum), we get 10. The circuit has successfully output binary 2. The physical propagation delay ($t_{pd}$) for the 74HC series at 5V is typically 18 nanoseconds, meaning the LEDs change state 18ns after you toggle the input switches.

Where You Meet This in Practice

You will almost never wire discrete 74-series ICs to build a multi-bit adder for a commercial product today. Instead, the half adder exists as a foundational schematic block inside larger architectures:

• Microcontroller ALUs: Inside the ATmega328P (the chip on an Arduino Uno) or the RISC-V cores in modern ESP32 variants, the Arithmetic Logic Unit uses arrays of full adders—which are themselves constructed from half adders—to execute machine-code addition instructions like ADD r1, r2.
• FPGA and ASIC Design: If you are writing Verilog or VHDL for a Xilinx or Intel FPGA, you define adders behaviorally. The synthesis tool (like Vivado or Quartus) automatically maps your addition operators to Look-Up Tables (LUTs) configured as half and full adders.
• Ripple Carry Adders: To add multi-bit numbers (e.g., two 8-bit bytes), engineers chain full adders together. The very first stage of a ripple carry adder, which handles the Least Significant Bit (LSB) and has no incoming carry from a previous stage, is functionally identical to a half adder.

For a quick look at how this translates to modern hardware description languages, here is the complete Verilog implementation of a half adder:

module half_adder (
    input wire A,
    input wire B,
    output wire Sum,
    output wire Carry
);
    assign Sum = A ^ B;   // XOR operation
    assign Carry = A & B; // AND operation
endmodule

Half Adder vs. Full Adder: The Common Confusion

The most common mistake beginners make in digital logic courses and interviews is confusing a half adder with a full adder. The distinction comes down to one missing pin: the Carry-In (Cin).

For deeper reading on combinational logic architectures, the Electronics Tutorials combinational logic guide provides excellent schematic breakdowns of how these gates scale into complex arithmetic units.