A unity gain op amp—commonly called a voltage follower or buffer—is an operational amplifier configured to output the exact voltage applied to its non-inverting input. The voltage gain is strictly 1 (or 0 dB). While it provides no voltage amplification, it performs a critical function in circuit design: impedance transformation. It offers massively high input impedance (drawing virtually zero current from the source) and very low output impedance (capable of driving heavy loads without the signal sagging).

If you are interfacing a high-impedance sensor to a microcontroller ADC, or driving a long cable with a precision reference, the unity gain buffer is the workhorse topology you need. Here is how to select, bias, build, and troubleshoot one on the bench.

Symbol, Pinout, and the Core Topology

The schematic symbol for a unity gain buffer is simply the standard op-amp triangle with a specific feedback routing. The input signal connects to the non-inverting input (+). The output pin is wired directly back to the inverting input (-). This 100% negative feedback forces the op-amp's internal differential stage to drive the output until the voltage at the inverting pin perfectly matches the non-inverting pin.

Bench Tip: Never leave unused op-amp inputs floating on a multi-channel chip (like a dual LM358). A floating high-gain input will amplify ambient RF noise, causing the internal output stage to saturate, overheat, and introduce noise into your active channels. Always wire unused sections as unity gain buffers and tie the non-inverting input to ground or a mid-rail reference.

Standard 8-Pin DIP Pinout

Most hobbyist and prototyping buffers use an 8-pin DIP package containing two independent op-amps (a "dual" op-amp). The industry-standard pinout is:

  • Pin 1: Output A
  • Pin 2: Inverting Input A (-)
  • Pin 3: Non-Inverting Input A (+)
  • Pin 4: V- (Ground or Negative Supply)
  • Pin 5: Non-Inverting Input B (+)
  • Pin 6: Inverting Input B (-)
  • Pin 7: Output B
  • Pin 8: V+ (Positive Supply)

Selecting and Biasing: Safe Default Part Numbers

Choosing the right op-amp depends entirely on your supply voltage and whether you need rail-to-rail performance. Here are three safe defaults that cover 95% of bench and DIY scenarios, complete with their critical ratings.

Part Number Best Use Case Supply Range Critical Limitation
LM358 General purpose, single-supply DC buffering 3V to 32V (Single) Output cannot reach the positive rail (loses ~1.5V). Not rail-to-rail.
TLV2372 3.3V / 5V microcontroller ADC buffering 2.7V to 16V Rail-to-rail I/O, but higher cost and lower max output current than LM358.
OPA2134 Audio signals, low-noise sensor amplification ±2.5V to ±18V (Dual) Requires dual (split) supplies for optimal headroom. Overkill for simple DC.

Biasing for Single-Supply AC Signals

If you are running an LM358 off a single 12V supply and need to buffer an AC audio signal, you cannot simply tie the V- pin to ground and feed the AC signal into the + pin. The op-amp cannot output negative voltages; it will clip the bottom half of your waveform. You must create a virtual ground. Use two 10kΩ resistors to divide your 12V supply down to 6V, buffer that 6V with one half of the LM358, and use that 6V reference as the DC bias (mid-rail) for your AC signal via a coupling capacitor.

Operation Regions and the Application Circuit

An op-amp in a unity gain configuration operates in one of three regions depending on the input voltage and the power supply rails. Understanding these prevents "ghost" debugging when your circuit isn't behaving as expected.

Region Condition (Assuming 12V Single Supply, LM358) Typical Output State
Linear (Active) Input between ~0V and 10.5V Vout = Vin (Tracks perfectly)
Positive Saturation Input > 10.5V Vout pegs at ~10.5V (VCC - 1.5V drop)
Negative Saturation Input < 0V (or below common-mode limit) Vout pegs at ~0.02V (Near ground)

Complete Application Circuit: ESP32 ADC Buffer

The ESP32's ADC has a notoriously low and non-linear input impedance, which will severely load down a high-resistance voltage divider. Here is a robust circuit to buffer a 12V battery monitor down to a safe 3.3V for the ESP32.

  1. Voltage Divider: Connect an 82kΩ resistor (R1) from the 12V battery positive to the op-amp non-inverting input (Pin 3). Connect a 33kΩ resistor (R2) from Pin 3 to Ground. This yields roughly 3.38V at the input.
  2. Power: Connect Pin 8 (V+) to the ESP32's 5V rail. Connect Pin 4 (V-) to Ground. (The TLV2372 is used here for rail-to-rail 5V operation).
  3. Feedback: Wire a jumper directly from Pin 1 (Output) to Pin 2 (Inverting Input).
  4. Isolation Resistor (Crucial): Place a 100Ω series resistor between Pin 1 and the ESP32 ADC pin. This isolates the op-amp from the ADC's internal sampling capacitor, preventing high-frequency oscillation.
  5. Bypass: Place a 100nF ceramic capacitor directly across Pin 8 and Pin 4.

Bench Walkthrough: The Capacitive Load Oscillation Trap

Theory is clean; the bench is messy. Here is a real-world scenario demonstrating how a unity gain buffer fails when practical physics interferes with ideal models.

The Setup: During a data acquisition (DAQ) integration, I needed to buffer a highly stable 5.000V precision reference and send it over a 10-meter RG-58 coaxial cable to a remote logging unit. I wired an LM358 as a unity gain follower. The non-inverting input received the 5V reference, and the output was tied directly to the center conductor of the BNC connector.

The Numbers: Expected output at the DAQ end: 5.000V DC. The coaxial cable had a specified capacitance of 100pF per meter, totaling 1000pF (1nF) of pure capacitive load on the op-amp's output pin.

The Outcome: When I powered the circuit, the DAQ read erratic values bouncing between 1.2V and 8.4V. Hooking an oscilloscope to the op-amp output revealed a violent 45kHz triangle wave oscillation. The op-amp was acting as an audio-frequency oscillator, not a buffer.

What Went Wrong: A coaxial cable is essentially a giant capacitor. Driving a heavy capacitive load directly from an op-amp's output introduces a low-frequency pole in the feedback loop. This destroys the op-amp's phase margin. By the time the internal circuitry reacts to correct the output voltage, the capacitor has already absorbed the charge and pushed the feedback out of phase, causing the loop to become unstable and oscillate.

The Fix: I removed the direct connection to the cable. Instead, I kept the feedback loop tied directly to Pin 1 (Output). Then, I added a 47Ω series resistor between Pin 1 and the BNC connector. This resistor isolated the capacitive load from the feedback loop, restoring phase margin. The oscillation vanished instantly, and the DAQ read a rock-solid 5.001V. Always use an isolation resistor (typically 22Ω to 100Ω) when a unity gain buffer drives cables, long PCB traces, or MOSFET gates.

How Op-Amps Fail and How to Test Them with a Multimeter

Op-amps rarely fail gracefully. They usually die from overvoltage on the inputs (exceeding the supply rails, causing latch-up or gate rupture) or shorting the output pin to a voltage rail (frying the internal push-pull output transistors). If you suspect a dead buffer, follow this diagnostic sequence.

Step-by-Step Multimeter Testing

  1. De-energize and Discharge: Remove power from the circuit. Short any large capacitors to ground safely. Set your digital multimeter (DMM) to Diode/Continuity mode.
  2. Check for Output Shorts: Place the red probe on Ground and the black probe on the op-amp Output pin. Note the reading. Swap the probes. You should see an 'OL' (Open Loop) or a standard silicon diode drop (0.5V to 0.8V) due to the internal protection diodes. If you read 0.00V or a dead short in either direction, the output stage is fried. Desolder and replace the chip.
  3. Verify Power Delivery: Restore power to the circuit. Switch the DMM to DC Voltage. Measure Pin 8 (V+) relative to Pin 4 (V-). If you expect 12V but read 2V, your issue is upstream in the power supply or a cracked PCB trace, not the op-amp.
  4. The Tracking Test: With power applied, measure the voltage at the Non-Inverting Input (+). Let's say you measure 2.50V. Now measure the Output pin.
    • If the Output reads 2.50V (or within a few millivolts), the op-amp is functioning perfectly.
    • If the Output is pegged near the positive rail (e.g., 10.5V on a 12V supply) or stuck at 0V despite a valid mid-rail input, the internal differential pair is blown or the feedback trace is broken.

For deeper design insights on avoiding stability issues, refer to the Texas Instruments LM358 Datasheet for exact common-mode limits, and review All About Circuits' guide on op-amp buffers for foundational impedance theory. Mastering the unity gain configuration is the first real step toward understanding active filter design and precision analog signal chains.