You use unequal capacitors in series primarily to create a capacitive AC voltage divider that attenuates a signal without dissipating heat or passing DC, or to synthesize a non-standard fractional capacitance for precision timing. Unlike resistors, series capacitors divide voltage inversely proportional to their capacitance values. By intentionally selecting unequal values, you dial in exact AC attenuation ratios while maintaining infinite DC resistance.
However, this topology is strictly for AC or transient signals. Safety Warning: Never use unequal capacitors in series for high-voltage DC bus filtering (e.g., 400V+ motor drives or tube amplifiers). In DC steady-state, voltage divides based on leakage resistance, not capacitance. Placing a 10µF and 100µF capacitor in series across a 500V DC link will overvolt and catastrophically fail the smaller capacitor. For DC voltage derating, always use equal-value capacitors paired with parallel bleeder resistors.
The Core Topology: Nodes and AC Behavior
The series capacitive divider consists of two components arranged linearly between a signal source and ground. To analyze it, we define three specific nodes:
- Node A (Input): The AC signal source connection.
- Node B (Midpoint): The electrical junction between the two capacitors. This is your output ($V_{out}$) tap.
- Node C (Ground): The common reference or return path.
Capacitor $C_1$ bridges Node A and Node B. Capacitor $C_2$ bridges Node B and Node C. Because capacitive reactance ($X_c$) is inversely proportional to capacitance ($X_c = 1 / (2\pi f C)$), the smaller capacitor exhibits higher impedance and drops more voltage. The transfer function for the AC voltage at Node B is:
$V_{out} = V_{in} \times \frac{C_1}{C_1 + C_2}$
Notice that the ratio depends entirely on the capacitance values, making the attenuation theoretically independent of frequency—provided the frequency is high enough that the capacitive reactance dominates the source and load impedances. For a deeper mathematical breakdown of reactive dividers, refer to the Electronics Tutorials guide on capacitive dividers.
Why This Topology Over the Alternatives?
Why not just use a standard resistive divider or two equal-value capacitors? The choice hinges on DC isolation, thermal management, and ratio flexibility.
| Criterion | Unequal Series Capacitors | Equal Series Capacitors | Resistive Divider |
|---|---|---|---|
| Attenuation Ratio | Highly flexible (any ratio via $C_1/C_2$) | Fixed at exactly 0.5 (1:1) | Highly flexible (via $R_1/R_2$) |
| DC Blocking | Yes (infinite DC impedance) | Yes (infinite DC impedance) | No (passes DC to output) |
| Heat Dissipation | Negligible (reactive components) | Negligible | High (dissipates $I^2R$ heat) |
| Source Loading | Low (if C values are small) | Low | High (draws continuous DC current) |
You choose unequal series capacitors when you must step down an AC signal (like a hot synthesizer output to a guitar pedal input) without loading the source with DC current or generating thermal noise. Equal capacitors fail here because they lock you into a 50% attenuation, which rarely matches real-world interfacing requirements.
Design Walkthrough: 2Vrms to 0.5Vrms Audio Attenuator
Let’s design a front-end attenuator for an audio circuit. We have a 2Vrms AC signal at 1kHz, and we need to step it down to 0.5Vrms to prevent clipping in the next op-amp stage.
Step 1: Calculate the required ratio.
Target Ratio = $0.5V / 2.0V = 0.25$.
Step 2: Select $C_1$ from standard E12 values.
Let’s pick $C_1 = 10\text{nF}$. Using our transfer function:
$0.25 = \frac{10\text{nF}}{10\text{nF} + C_2}$
$2.5\text{nF} + 0.25 C_2 = 10\text{nF}$
$0.25 C_2 = 7.5\text{nF}$
$C_2 = 30\text{nF}$.
Luckily, 30nF is a standard E12 value. At 1kHz, the reactance of the 10nF cap is roughly $15.9\text{k}\Omega$, and the 30nF cap is $5.3\text{k}\Omega$. The total impedance is high enough not to load a typical audio source (which expects $>10\text{k}\Omega$), but low enough to reject high-frequency EMI.
Parasitic Realities: Dielectric Selection and High-Frequency Limits
The math above assumes ideal components. In reality, the dielectric material inside the capacitor dictates whether your circuit works or distorts. If you use standard X7R or Y5V ceramic capacitors, you will introduce severe voltage coefficient of capacitance (VCC) and microphonic distortion. X7R capacitors can lose up to 50% of their nominal capacitance when a DC bias or large AC swing is applied, ruining your 0.25 attenuation ratio.
For any audio, RF, or precision analog signal path, you must specify C0G (also known as NP0) dielectrics. C0G ceramics have a near-zero temperature coefficient and virtually no voltage-dependent capacitance shift. Furthermore, at frequencies above 10MHz, the parasitic Equivalent Series Inductance (ESL) of the physical component package begins to dominate, turning your capacitive divider into an inductive one. Keep leads short and use surface-mount 0603 or 0805 packages for high-frequency integrity.
Failure Mode Contrast: What Breaks at the Extremes?
Understanding how the circuit fails is critical for troubleshooting. Here is the behavior matrix if a component fails open or short at the extremes:
| Failure State | Node B (Output) Behavior | System Consequence |
|---|---|---|
| $C_1$ (10nF) Shorts | $V_{out}$ rises to equal $V_{in}$ (2Vrms) | Downstream op-amp clips heavily; potential thermal damage to input stage. |
| $C_1$ (10nF) Opens | $V_{out}$ drops to 0V | Complete signal loss; circuit appears dead. |
| $C_2$ (30nF) Shorts | $V_{out}$ drops to 0V (Grounded) | Signal shunted to ground; source may experience minor loading. |
| $C_2$ (30nF) Opens | $V_{out}$ floats to $V_{in}$ (if measured with high-Z scope) | Attenuation is lost; downstream stage receives full 2Vrms signal. |
Notice that a shorted $C_1$ or an open $C_2$ both result in the loss of attenuation, passing the full, un-stepped-down signal to the next stage. This is a common failure mode in DIY audio builds where a solder bridge accidentally shorts the series capacitor.
Breadboard Verification Protocol
Do not trust the math until you verify it on the bench. Follow this exact sequence to validate your 10nF/30nF divider:
- Prep the Board: Insert the 10nF C0G capacitor between Row 10 (Node A) and Row 15 (Node B). Insert the 30nF C0G capacitor between Row 15 (Node B) and the negative rail (Node C).
- Connect the Source: Attach your function generator’s BNC-to-alligator clip to Row 10 and the ground rail. Set it to 1kHz, Sine wave, 2Vrms (which is ~5.6Vpp), with 0V DC offset.
- Probe the Input: Connect Oscilloscope Channel 1 to Row 10. Set to AC coupling, 1V/div, 1ms/div. Verify you see a clean 5.6Vpp sine wave.
- Probe the Output: Connect Channel 2 to Row 15 (Node B). Keep settings identical. You should measure exactly 1.4Vpp (0.5Vrms).
- Sweep the Frequency: Change the function generator to 10kHz, then 100Hz. The amplitude ratio between Ch1 and Ch2 should remain exactly 4:1. If the ratio shifts at 100Hz, your load impedance is too low, or your capacitors are leaking.
Decision Path: Selecting Your Final Components
Use this decision tree to finalize your component selection for any AC capacitive divider design.
| Condition Check | If YES | If NO |
|---|---|---|
| Is the signal purely AC (no DC bias required at output)? | Proceed to next step. | Stop. Use a resistive divider. |
| Is the lowest frequency of interest > 500Hz? | Proceed. (Lower frequencies require physically massive >1µF caps). | Stop. Use an active op-amp attenuator or resistors. |
| Does the source have a low output impedance (< 1kΩ)? | Proceed. (High-Z sources will interact with the cap reactance). | Recalculate using the source impedance as part of $C_1$. |
| Is signal fidelity (low distortion) critical? | Mandatory: Select C0G/NP0 dielectric. | X7R is acceptable for crude filtering. |
The Default Concrete Pick:
If your design passes the checks above and you are building the 2Vrms to 0.5Vrms audio attenuator detailed in this guide, do not settle for generic kit capacitors. Order the KEMET C0805C103J1GACTU (10nF, 100V, C0G, 0805 package) for $C_1$ and the KEMET C0805C303J1GACTU (30nF, 100V, C0G, 0805 package) for $C_2$. The 100V rating provides massive headroom against transient spikes, and the C0G dielectric guarantees the 0.25 attenuation ratio holds true regardless of signal swing or ambient temperature shifts. For further reading on passive component parasitics in analog design, consult the Learn About Electronics AC theory archives.
