Early voltage ($V_A$) is the theoretical extrapolated voltage at which a bipolar junction transistor's (BJT) collector current would drop to zero, quantifying how much collector current leaks upward as collector-emitter voltage increases due to base-width modulation.
If you are designing a simple BJT switch, you can safely ignore this parameter. But if you are building a precision current mirror, a high-gain common-emitter amplifier, or an active load, Early voltage is the single most critical parameter dictating your circuit's output impedance and voltage gain. It defines the slope of the $I_C$ vs $V_{CE}$ curves in the active region. A higher Early voltage means flatter curves, higher output resistance, and better current source performance.
The Physics: Base-Width Modulation and Output Impedance
To understand Early voltage, you have to look inside the BJT's physical structure. When a BJT operates in the forward-active region, the base-collector junction is reverse-biased. As you increase the collector-emitter voltage ($V_{CE}$), the depletion region at the base-collector junction widens. Because the base region is lightly doped compared to the emitter, this depletion region extends significantly into the base.
This narrows the effective electrical width of the base—a phenomenon known as base-width modulation. A narrower base means fewer charge carriers recombine in the base region, which increases the collector current ($I_C$) even if the base-emitter voltage ($V_{BE}$) remains perfectly constant.
Think of a water valve where increasing the downstream pressure physically erodes the valve seat, widening the channel and allowing more water to flow despite the valve handle staying in the exact same position.
If you plot $I_C$ against $V_{CE}$ for various base currents and extrapolate the linear, active-region slopes backward to the left, they all converge at a single point on the negative voltage axis. That intersection point is the Early voltage ($V_A$). It is not a real voltage you can measure with a multimeter on the bench; it is a modeling parameter used to calculate the transistor's small-signal output resistance ($r_o$).
Worked Numeric Example: Calculating Output Resistance
The practical impact of Early voltage is realized through the small-signal output resistance, $r_o$. The formula is:
r_o = (V_A + V_{CE}) / I_C
Since $V_A$ is typically much larger than $V_{CE}$ (often 50V to 150V), we usually simplify this to r_o ≈ V_A / I_C.
Bench Scenario: You are biasing a standard 2N3904 NPN transistor at a collector current ($I_C$) of 2 mA. The datasheet and SPICE models typically assign a $V_A$ of roughly 100V to the 2N3904. Your $V_{CE}$ is biased at 5V.
- Exact calculation: r_o = (100V + 5V) / 0.002A = 52,500 Ω (52.5 kΩ)
- Simplified calculation: r_o ≈ 100V / 0.002A = 50,000 Ω (50 kΩ)
Now, compare this to a BC547, which has a lower Early voltage of approximately 70V. At the exact same 2 mA bias current, the BC547 yields an $r_o$ of only 35 kΩ. If you use these transistors as active loads in a differential pair, the 2N3904 will yield roughly 42% more voltage gain than the BC547 simply because of its higher Early voltage.
Where You Meet Early Voltage in Practice
Early voltage stops being an abstract textbook concept and starts ruining your day in three specific circuit topologies:
- Current Mirrors: In a basic two-transistor current mirror, the output current should perfectly match the reference current. However, if the output transistor experiences a different $V_{CE}$ than the reference transistor, base-width modulation causes the output current to drift. A low $V_A$ results in a sloppy current source that varies with supply voltage ripple.
- Common-Emitter Amplifiers: The voltage gain of a common-emitter stage with an active load is roughly $A_v = -g_m (r_{o1} || r_{o2})$. Because $r_o$ is inversely proportional to $I_C$ and directly proportional to $V_A$, a low Early voltage hard-limits your maximum achievable gain, regardless of how high you push the bias current.
- Wilson and Cascode Current Sources: Designers use cascode configurations specifically to mitigate the Early effect. By stacking a second transistor on top of the primary BJT, the cascode holds the primary transistor's $V_{CE}$ constant, effectively multiplying the output impedance by the beta ($\beta$) of the cascode device and neutralizing the Early voltage limitation.
Common Confusions: What Early Voltage Is Not
When reading datasheets or troubleshooting, engineers frequently mix up three distinct concepts:
- Early Voltage vs. Early Effect: The Early effect is the physical phenomenon (base-width modulation). Early voltage is the mathematical parameter ($V_A$) used to model the severity of that effect. You experience the effect; you calculate with the voltage.
- Early Voltage vs. Breakdown Voltage ($V_{CEO}$): $V_{CEO}$ (Collector-Emitter Breakdown Voltage with Base Open) is the physical voltage limit where avalanche multiplication destroys the junction or causes massive leakage. For a 2N3904, $V_{CEO}$ is 40V. $V_A$ is a theoretical extrapolated value (e.g., 100V) that exists on a graph, not a physical breakdown limit. Never design a circuit assuming $V_A$ is your maximum voltage rating.
- Early Voltage vs. Early Capacitance: Base-width modulation also changes the depletion width, which modulates the base-collector junction capacitance ($C_{cb}$). While related to the same physical mechanism, $V_A$ strictly models the DC/low-frequency resistive output slope, not the high-frequency capacitive roll-off.
Decision Matrix: Selecting Components Based on $V_A$
Do not waste time calculating Early voltage for every transistor in your design. Use this decision path to select the right component class for your specific topology.
| Circuit Application | Does $V_A$ Matter? | Required $V_A$ Characteristic | Concrete Component Pick |
|---|---|---|---|
| BJT as a saturated switch (digital logic, relay driving) | No. The transistor is in saturation; $V_{CE}$ is ~0.2V. | Ignore $V_A$. Optimize for low $V_{CE(sat)}$ and high $I_C$. | 2N2222 or MMBT3904 |
| General-purpose audio preamp (common-emitter, resistive load) | Marginally. Gain is dominated by the collector resistor, not $r_o$. | Standard $V_A$ (70V - 100V) is sufficient. | BC549C (high beta, low noise) |
| High-gain CE amplifier with active load | Yes. Gain is strictly limited by $r_o$. | High $V_A$ (>100V) and high Early-to-beta ratio. | MPSA42 (High voltage, high $V_A$) or use a Cascode topology |
| Precision current mirror / Active load in diff-pair | Critical. Mismatched $V_A$ or low $V_A$ ruins CMRR and current matching. | Monolithic matched pair with guaranteed high $V_A$ and matched $V_{BE}$. | SSM2220 (NPN) or MAT04 (NPN Quad) |
Pro-Tip for Current Mirrors: If you must use discrete transistors like the 2N3904 for a current mirror because you don't have an SSM2220 on hand, manually match two transistors for $V_{BE}$ using a curve tracer, and ensure both transistors experience the exact same $V_{CE}$ by adding a dummy diode-connected transistor in the reference leg.
FAQ: Bench and Design Questions
How do I measure Early voltage on my bench?
You cannot measure it directly with a multimeter. You must use a curve tracer or build a test jig with a precision SMU (Source Measure Unit). Sweep $V_{CE}$ from 1V to 10V while holding $I_B$ constant, plot the $I_C$ curve, find the linear slope in the active region, and extrapolate the line back to the X-axis ($I_C = 0$). The X-intercept is $-V_A$. Alternatively, extract it from SPICE model parameters (look for the VAF parameter in the BJT model file).
Do MOSFETs have an Early voltage?
Strictly speaking, no. The Early effect is specific to bipolar junction transistors. However, MOSFETs suffer from a mathematically identical phenomenon called channel-length modulation, modeled by the parameter lambda ($\lambda$). The MOSFET equivalent to Early voltage is $1/\lambda$. Just like BJTs, shorter channel MOSFETs (like modern nanometer-scale logic FETs) suffer from severe channel-length modulation, resulting in poor output impedance compared to longer-channel lateral MOSFETs.
Why does my SPICE simulation show infinite gain?
If your SPICE simulator yields impossibly high voltage gain (e.g., >50,000 V/V) for a simple common-emitter amplifier, check the BJT model's VAF (Forward Early Voltage) parameter. Many generic or poorly written SPICE models leave VAF set to INF (infinity) by default, which disables base-width modulation and sets $r_o$ to infinity. Always verify the SPICE model against a real transistor datasheet before trusting AC analysis results.
When designing analog front-ends, never leave your output impedance to chance. If your topology relies on the transistor acting as a current source, default to a monolithic matched pair like the SSM2220 to guarantee high, matched Early voltage. If you are stuck with discrete BJTs and need high gain, abandon the simple common-emitter stage and implement a cascode configuration to mechanically defeat base-width modulation.
