The UJT Transistor: Pinout, Testing, and Relaxation Oscillator Circuits

The UJT Transistor: Pinout, Symbol, and 2026 Applications

The unijunction transistor (UJT) is a three-terminal, single-junction semiconductor device that operates fundamentally differently from standard bipolar junction transistors (BJTs) or field-effect transistors (FETs). While digital microcontrollers and 555 timers have replaced the UJT in most modern consumer timing circuits, the device remains irreplaceable in 2026 for specific niche applications: high-EMI environments where digital logic suffers from brownouts, analog synthesizer modulation circuits, and legacy industrial phase-angle SCR motor drives.

Unlike a BJT, the UJT does not amplify signals. Instead, it acts as a voltage-controlled switch with a distinct negative resistance region. Understanding its physical layout is critical for bench testing and circuit design.

Pinout and Symbol Identification

The UJT features three terminals: Emitter (E), Base 1 (B1), and Base 2 (B2). Internally, it consists of a lightly doped N-type silicon bar with ohmic contacts at both ends (B1 and B2), and a heavily doped P-type emitter junction alloyed into the bar closer to B2.

• Symbol: The schematic symbol features an arrow (the Emitter) pointing at a diagonal line representing the N-type bar. The ends of the diagonal line are B1 and B2. The arrow points inward for an N-type UJT (the only common type).
• Physical Pinout (TO-18 Can): Looking at the bottom of the metal can with the tab pointing toward you, the pins are typically arranged in a triangle: Emitter is the isolated pin, B1 is clockwise from the tab, and B2 is counter-clockwise. Always verify with a datasheet, as TO-92 plastic variants exist with different layouts.

Operation Regions and Biasing the UJT

To bias a UJT correctly, you must understand the intrinsic standoff ratio ($\eta$). This is a fixed internal voltage divider ratio determined by the physical placement of the emitter junction along the N-type bar. For a 2N2646, $\eta$ is typically 0.65. The voltage at the emitter junction relative to B1, when no emitter current is flowing, is $V_{RB1} = \eta \times V_{BB}$.

The UJT operates in three distinct regions, dictated by the voltage applied to the Emitter ($V_E$) relative to the Peak Point Voltage ($V_P$).

Proper biasing requires setting the external emitter resistor ($R_E$) so that the DC load line intersects the UJT characteristic curve strictly within the negative resistance region. If $R_E$ is too high, the load line intersects the cut-off region, and the device will latch off. If $R_E$ is too low, it intersects the saturation region, and the device will latch on.

Bench Testing: Verifying a UJT with a Multimeter

UJTs typically fail due to thermal runaway in the emitter junction or overvoltage puncturing the P-N barrier. When they fail, they usually short the Emitter to Base 1. Here is how to definitively test a suspected UJT on the bench using a standard digital multimeter (DMM).

1. Set the DMM to Diode Test Mode. Ensure the UJT is completely removed from the circuit to avoid parallel resistance paths skewing your readings.
2. Test the Emitter Junction (Forward Bias). Place the red probe on the Emitter (E) and the black probe on Base 1 (B1). You should read a standard silicon diode drop, typically 0.45V to 0.75V. Repeat with the black probe on Base 2 (B2); you should see a similar diode drop.
3. Test the Emitter Junction (Reverse Bias). Swap the probes (black on E, red on B1, then red on B2). The meter should read OL (Over Limit / Open). If you read a low voltage or continuity in this direction, the emitter junction is shorted and the UJT is dead.
4. Measure Interbase Resistance ($R_{BB}$). Switch the DMM to the Ohms (Ω) setting. Measure the resistance between B1 and B2. Because this is a simple doped silicon bar, it is non-polarized. You should read the same value in both directions. For a 2N2646, expect 4.7kΩ to 9.1kΩ. If you read near 0Ω, the bar is shorted. If you read OL, the internal bond wire has blown open.

Application Circuit: 2N2646 Relaxation Oscillator

The most common application for a UJT is the relaxation oscillator, widely used to generate sawtooth waveforms or trigger pulses for SCRs and TRIACs. The circuit relies on an RC network charging until it hits the UJT's peak voltage, at which point the UJT fires, rapidly discharging the capacitor through B1, creating a sharp voltage pulse.

Circuit Specifications and Component Values

• Supply Voltage ($V_{CC}$): 12V DC
• UJT: 2N2646 (Assume $\eta = 0.65$, $V_D = 0.7V$)
• Timing Resistor ($R_E$): 10kΩ (1/4W)
• Timing Capacitor ($C_E$): 0.1µF (Film or C0G ceramic, avoid high-K dielectrics)
• Base 1 Resistor ($R_1$): 100Ω (Generates the output trigger pulse)
• Base 2 Resistor ($R_2$): 470Ω (Provides temperature compensation for the internal diode drop)

Calculating the Operating Point

First, we calculate the Peak Point Voltage ($V_P$) where the UJT will fire:

$V_P = (\eta \times V_{CC}) + V_D = (0.65 \times 12V) + 0.7V = 8.5V$

Next, we verify that our chosen $R_E$ (10kΩ) falls within the safe load line limits to guarantee oscillation. The maximum allowable resistance ($R_{max}$) must supply at least the peak point current ($I_P$, typically 5µA for the 2N2646):

$R_{max} = (V_{CC} - V_P) / I_P = (12V - 8.5V) / 5\mu A = 700k\Omega$

The minimum allowable resistance ($R_{min}$) must not exceed the valley current ($I_V$, typically 3.5mA):

$R_{min} = (V_{CC} - V_V) / I_V = (12V - 1.5V) / 3.5mA \approx 3k\Omega$

Since our 10kΩ $R_E$ sits comfortably between 3kΩ and 700kΩ, the circuit will oscillate reliably. The frequency of oscillation is approximated by:

$f \approx 1 / (R_E \times C_E \times \ln(1 / (1 - \eta))) = 1 / (10,000 \times 0.0000001 \times \ln(1 / 0.35)) \approx 949 Hz$

For a deeper dive into the mathematical derivations of UJT timing circuits, the Electronics Tutorials guide on relaxation oscillators provides excellent baseline formulas.

Real-World Scenario: The SCR Trigger That Wouldn't Fire

Theory is clean; the bench is messy. Here is a real-world scenario demonstrating what happens when UJT biasing rules are ignored in a practical design.

The Setup

I was tasked with repairing a phase-angle firing module for a 2kW industrial resistive heater. The original control board used a microcontroller that kept resetting due to massive EMI from the contactors. I decided to retrofit it with a pure analog UJT relaxation oscillator to generate the gate trigger pulses for the main TRIAC, using a pulse transformer for isolation. I needed a timing delay of roughly 4ms to achieve a specific firing angle on the 60Hz AC line.

The Numbers

Using a 15V DC derived supply, I calculated the required RC time constant. I selected a 0.22µF timing capacitor. To hit the 4ms target, the math dictated an $R_E$ value of approximately 28kΩ. I installed a 50kΩ trimpot to allow for fine-tuning on the bench, initially setting it to 28kΩ.

The Outcome

I powered up the board. The TRIAC fired exactly once, delivering a single half-cycle of power to the heater, and then stopped completely. The UJT was not oscillating; it was latching in the cut-off region after the first discharge.

What Went Wrong

I had fallen victim to the load line trap. While my 28kΩ resistance was mathematically correct for the desired *time constant*, I failed to account for the voltage drop across the pulse transformer's primary winding and the aging of the 15V linear regulator under load. When the UJT fired, the sudden current draw through the base caused the local 15V rail to sag to 11V.

Because $V_{CC}$ dropped, the Peak Voltage ($V_P$) dropped proportionally. More critically, the current available through the 28kΩ resistor at the new, lower supply voltage fell below the UJT's Valley Current ($I_V$). The capacitor discharged, the UJT turned off, but the resistor could no longer supply enough current to push the capacitor voltage back up to the new $V_P$. The circuit stalled.

The Fix: I swapped the 0.22µF capacitor for a 0.047µF film capacitor and reduced the trimpot to 6.8kΩ to maintain the same RC time constant. This drastically lowered the impedance of the timing network, ensuring that even with a sagging power supply, the current through $R_E$ remained well above the 3.5mA valley current threshold. The oscillator fired continuously, and the heater controller ran flawlessly. For more on designing robust SCR trigger networks, All About Circuits offers a comprehensive breakdown of UJT load line limitations.