Designing a Transistor NAND Gate Circuit: RTL Topology & Component Selection

A discrete transistor NAND gate circuit uses two NPN bipolar junction transistors (BJTs) wired in series between the output node and ground, with a pull-up resistor connecting the output to Vcc. When both inputs are HIGH, both transistors saturate, pulling the output LOW. For a standard 5V logic level, the optimal baseline configuration uses 2N3904 transistors, a 4.7kΩ pull-up resistor, and 10kΩ base resistors. This Resistor-Transistor Logic (RTL) approach gives you a functional NAND gate without relying on integrated circuits, making it ideal for high-voltage interfacing, educational teardowns, or custom discrete logic boards.

The RTL NAND Topology: Node Labels and Behavior

To understand the circuit, we must map the nodes. Unlike a NOR gate (which places transistors in parallel), the NAND gate relies on a series switching path to ground.

• Vcc (Node 1): 5V DC power supply.
• Vout (Node 2): The output node, located at the junction of the pull-up resistor (Rc) and the Collector of Q1.
• Node_Mid (Node 3): The intermediate floating node connecting the Emitter of Q1 to the Collector of Q2.
• GND (Node 4): Ground reference, connected to the Emitter of Q2.
• In_A & In_B: Logic inputs feeding the Base of Q1 and Q2 through base resistors (Rb1, Rb2).

The behavior of the circuit hinges on the continuity of the path from Vout to GND. Here is exactly what changes at the node level when inputs toggle:

Why Series NPNs? Topology vs. Alternatives and Failure Modes

You might wonder why we use series transistors for a NAND gate instead of building a NOR gate (parallel transistors) and following it with a discrete inverter. The series topology wins on part count and propagation delay. A parallel-plus-inverter design requires three transistors and multiple resistors. The series RTL NAND requires only two transistors and three resistors, reducing board space and the cumulative switching delay.

What Breaks at the Extremes (Failure Mode Contrast)

When designing discrete logic, you must account for component failure. Here is how the series topology reacts to hard faults compared to a parallel setup:

• If Rb1 Shorts (Input A to Base Q1): The base of Q1 receives unrestricted current from the 5V source. Q1 will likely overheat and fail short, or the power supply will brownout. Fix: Always use base resistors; never drive BJT bases directly from low-impedance voltage sources.
• If Q2 Collector-Emitter Shorts: Node_Mid is permanently tied to GND. If Input A goes HIGH, Q1 turns on and pulls Vout directly to ~0.2V. The gate acts like a simple inverter for Input A, ignoring Input B entirely.
• If Pull-up Rc Opens: When both transistors are OFF, Vout loses its pull-up path. The output node becomes high-impedance (floating). It will not drive the next stage HIGH and will act as an antenna for EMI noise.
• If Node_Mid Solder Joint Fails (Open): The series path to ground is physically broken. The gate is permanently stuck outputting HIGH, regardless of inputs.

Design Walkthrough: Calculating Real Component Values

Let's pick exact values for a 5V system driving a high-impedance CMOS input (like a CD4000 series chip) or an LED indicator. We will use the Resistor-Transistor Logic (RTL) design rules.

1. The Pull-Up Resistor (Rc)
Rc must be low enough to pull Vout HIGH quickly (overcoming parasitic capacitance) but high enough to limit waste current when the transistors saturate. A 4.7kΩ resistor is the standard sweet spot.
Math: I_c(sat) = (5V - 0.4V) / 4700Ω = 0.98mA. This keeps power dissipation under 5mW while providing adequate switching speed for audio or low-speed control signals.

2. The Base Resistors (Rb1, Rb2)
To ensure the 2N3904 transistors enter hard saturation, we use a "forced beta" (hFE) of 10.
Math: With a collector current of ~1mA, we need at least 0.1mA of base current. Assuming a 5V HIGH input and a 0.7V Base-Emitter drop: Rb = (5V - 0.7V) / 0.1mA = 43kΩ.
To guarantee saturation across temperature variations and provide faster turn-on times, we drop the resistance to a standard 10kΩ. This supplies ~0.43mA of base current, deeply saturating the transistor.

Final Bill of Materials (BOM):

• Q1, Q2: 2x 2N3904 NPN Transistors (TO-92 package)
• Rc: 1x 4.7kΩ 1/4W Resistor (Yellow-Violet-Red-Gold)
• Rb1, Rb2: 2x 10kΩ 1/4W Resistor (Brown-Black-Orange-Gold)

Breadboard Build and Step-by-Step Verification

Follow these steps to build and verify the circuit on a standard solderless breadboard. Safety Note: While this is a 5V DC circuit, always verify power is disconnected before inserting or removing components to prevent accidental shorting of the power rails.

1. Prep the Rails: Connect your bench power supply or 5V USB breakout to the breadboard's positive (red) and ground (blue) rails. Do not turn the power on yet.
2. Place Transistors: Insert Q1 and Q2 into the breadboard. Ensure they are in different rows. Wire the Emitter of Q1 directly to the Collector of Q2 using a short jumper. Wire the Emitter of Q2 to the ground rail.
3. Install Pull-Up: Insert the 4.7kΩ resistor (Rc) so one leg connects to the positive 5V rail and the other leg connects to the Collector of Q1. This junction is your Vout.
4. Wire Base Resistors: Insert the 10kΩ resistors (Rb1, Rb2). Connect one end of Rb1 to the Base of Q1, and one end of Rb2 to the Base of Q2. Leave the other ends free for your logic inputs.
5. Connect Output Load: Connect an LED (with a 330Ω series resistor) or your multimeter's positive probe to Vout. Connect the LED cathode/multimeter negative to ground.
6. Power & Test: Turn on the 5V supply. With both inputs (Rb1 and Rb2 free ends) disconnected or tied to ground, measure Vout. It should read ~5.0V (HIGH).
7. Verify Logic LOW: Connect both Rb1 and Rb2 inputs to the 5V rail. Measure Vout. It must drop to ~0.4V (LOW). If it reads higher than 0.8V, your transistors are not saturating; check your resistor values and BJT pinout (E-B-C for flat-side-facing 2N3904).

Decision Path: Discrete Transistors vs. Logic ICs

Building a transistor NAND gate circuit is an excellent exercise, but is it the right choice for your final PCB or project enclosure? Use this decision matrix to finalize your component selection.