A switching capacitor circuit—commonly known as a charge pump—transfers discrete packets of charge between capacitors using electronic switches to step up, step down, or invert voltage. Unlike inductive boost converters that rely on magnetic fields and continuous current ramps, a switching capacitor circuit operates purely in the electrostatic domain. For low-power applications (under 100mA), this topology eliminates the need for bulky, EMI-generating inductors, offering a simpler, cheaper, and more compact PCB footprint.
The Flying Capacitor Topology: Node-by-Node Breakdown
To understand how charge is pumped, we must look at the fundamental 4-switch voltage doubler topology. This circuit relies on a "flying" capacitor that physically changes its connection nodes between two distinct clock phases.
Core Nodes and Components:
- V_IN: Source voltage (e.g., 5V).
- V_OUT: Target output node (e.g., 10V).
- GND: System ground reference.
- SW_A and SW_B: The intermediate nodes connecting to the flying capacitor.
- C_FLY: The flying capacitor that shuttles charge.
- C_OUT: The output reservoir capacitor that holds the charge and supplies the load.
- S1, S2, S3, S4: The four electronic switches (usually MOSFETs or CMOS logic gates).
Phase 2 (Transfer): S1 and S3 open. S2 and S4 close. C_FLY connects between V_IN and V_OUT. Because C_FLY already holds V_IN, and its low side is now tied to V_IN, its high side is pushed to 2 × V_IN. Current flows into C_OUT, charging it toward the 2 × V_IN target.
For a deeper theoretical foundation on how these charge transfer phases dictate efficiency, the All About Circuits guide on charge pumps provides an excellent breakdown of the underlying electrostatic equations.
Why Choose This Topology Over an Inductive Booster?
If you need to generate 12V from a 5V USB rail, why use a switching capacitor circuit instead of a standard inductive boost IC like the MT3608? The decision hinges on current requirements and electromagnetic compatibility.
| Criteria | Switching Capacitor Circuit | Inductive Boost Converter |
|---|---|---|
| Magnetics Required | No (Capacitors only) | Yes (Inductor required) |
| EMI Profile | Very Low (No magnetic flux) | High (Requires careful layout) |
| Max Practical Current | Low (~50mA to 150mA) | High (1A to 10A+) |
| Efficiency at 20mA | High (85-95%) | Moderate (70-85% due to switching losses) |
| Output Voltage Regulation | Poor (Drops linearly with load) | Excellent (Tight feedback loop) |
Choose the switching capacitor topology when: You need low noise for analog sensor rails, you are constrained by PCB height (no room for inductors), and your load draws less than 100mA. Choose inductive when: You need high current or tight voltage regulation under varying loads.
Design Walkthrough: Building a 5V to 10V Doubler
Let’s design a discrete 5V to 10V doubler capable of supplying 20mA. While dedicated ICs like the ICL7660 exist, building it with a CD4049UB CMOS hex inverter on a breadboard perfectly demonstrates the switching mechanics.
1. Component Selection & Values:
- Switches: CD4049UB hex inverter. We will parallel three inverters for the high-side switches and three for the low-side switches to reduce effective Rds(on) and handle the peak charging currents.
- Clock Source: 100kHz square wave from a function generator or an MCU GPIO pin.
- C_FLY (Flying Cap): 1µF, 16V, 0805 MLCC (X7R dielectric).
- C_OUT (Reservoir Cap): 10µF, 16V, 0805 MLCC (X5R or X7R dielectric).
2. Ripple Calculation:
Output ripple is dictated by the reservoir capacitor and the switching frequency. The formula is:
V_ripple = I_load / (f_clk × C_OUT)
With a 20mA load, 100kHz clock, and an effective 10µF capacitance:
V_ripple = 0.020A / (100,000 × 0.000010F) = 20mV peak-to-peak.
This is exceptionally clean for an unregulated supply. For more on managing charge pump efficiency and ripple trade-offs, refer to the Texas Instruments application note on charge pump circuits.
Behavior Matrix and Failure Mode Extremes
Understanding how a switching capacitor circuit reacts to parameter shifts and catastrophic failures is critical for debugging.
| Parameter Changed | System Behavior |
|---|---|
| Increase f_clk (100kHz → 500kHz) | Ripple decreases, but switching losses in the CMOS gates increase, lowering overall efficiency. |
| Decrease C_FLY (1µF → 0.1µF) | Output impedance rises. V_OUT sags heavily under load because less charge is transferred per cycle. |
| Increase Load Current (20mA → 80mA) | V_OUT drops linearly. The circuit acts like a voltage source with a high series resistance. |
What Breaks at the Extremes (Failure Modes):
- Shorted Switch (S1 stuck closed): If S1 is shorted and S2 closes during Phase 2, you create a direct shoot-through path from V_IN to GND. This will instantly overcurrent your power supply, potentially melting breadboard jumper wires and destroying the CD4049 IC.
- Open Switch (S4 fails open): Phase 2 never completes. C_FLY charges to 5V in Phase 1, but never transfers it to C_OUT. V_OUT will slowly bleed down to 0V through the load.
- Shorted C_FLY: During Phase 1, V_IN is shorted directly to GND. During Phase 2, V_IN is shorted to V_OUT. Both phases result in immediate catastrophic overcurrent.
Step-by-Step Breadboard Verification
Do not just wire the circuit and apply power. Follow this sequence to verify the switching capacitor circuit safely on the bench.
- De-energize and Build the Logic: With the power supply OFF, insert the CD4049UB. Wire VDD to 5V and VSS to GND. Connect your 100kHz clock signal to the inputs of the paralleled inverters.
- Verify the Clock: Before attaching any capacitors, probe the inverter outputs with an oscilloscope. Ensure you see clean, 5V peak-to-peak square waves. Crucial: Check for cross-conduction (shoot-through) spikes at the transitions. If spikes exceed 1V, add a small RC dead-time network to the clock inputs.
- Attach C_FLY and C_OUT: Connect the 1µF flying capacitor and 10µF reservoir capacitor. Ensure the ground of C_OUT is tied to the V_IN rail (not system GND) if building a strict doubler, or configure the IC pins according to the standard doubler schematic.
- Apply Power and Measure No-Load: Turn on the 5V supply. Probe V_OUT with a multimeter. You should read approximately 9.5V to 9.8V (the 0.2V-0.5V drop is due to the forward voltage of the CMOS output stages and ESR losses).
- Apply Load and Measure Ripple: Connect a 250Ω resistor across C_OUT (drawing ~40mA). Switch your oscilloscope to AC coupling, set the scale to 50mV/div, and probe V_OUT. You should see a sawtooth ripple waveform. If the ripple is massive (>500mV), your C_OUT has suffered DC bias derating or your breadboard parasitics are too high.
Frequently Asked Questions
How does switching frequency affect output ripple in a switching capacitor circuit?
Output ripple is inversely proportional to switching frequency. Doubling the clock frequency halves the peak-to-peak ripple voltage because the reservoir capacitor is replenished twice as often, requiring it to supply the load for a shorter duration between charge cycles. However, pushing the frequency too high (e.g., above 1MHz on a breadboard) introduces parasitic inductance from long jumper wires, which causes high-frequency ringing and increases switching losses in the MOSFETs, ultimately reducing efficiency.
Can I use standard electrolytic capacitors for the flying capacitor?
No. The flying capacitor (C_FLY) undergoes rapid charge and discharge cycles at the clock frequency. Standard aluminum electrolytic capacitors have high Equivalent Series Resistance (ESR) and significant Equivalent Series Inductance (ESL). The high ESR will cause massive I²R heating and voltage drops during the fast transient charge phases, severely limiting the current your circuit can deliver. Always use low-ESR Multilayer Ceramic Capacitors (MLCC) like X7R or X5R for C_FLY. You may use a low-ESR polymer or tantalum capacitor for the C_OUT reservoir if you need high capacitance in a small footprint, but MLCCs remain the gold standard.
Why is my switching capacitor circuit efficiency dropping under load?
Efficiency drops under load due to resistive losses in the charge transfer path. The total output impedance of a switching capacitor circuit is roughly R_out = 1 / (f_clk × C_FLY) + R_switches + ESR_caps. As you draw more current, the voltage drop across this internal resistance increases, meaning power is burned as heat rather than delivered to the load. To fix this, you must either lower the internal resistance by using MOSFETs with lower Rds(on), increase the C_FLY value, or increase the switching frequency. If your load demands more than 100mA, the resistive losses become so high that you should abandon the charge pump and switch to an inductive boost topology.
