A step recovery diode (SRD)—often called a snap-off or charge-storage diode—is a specialized RF semiconductor that abruptly cuts off reverse current in picoseconds to generate high-order microwave harmonics or extremely short pulses. While a standard rectifier diode exhibits a soft, gradual reverse recovery tail that limits its high-frequency usefulness, an SRD is engineered to maintain a low-impedance reverse conduction state until its stored minority charge is entirely depleted. At that exact moment, it "snaps" to a high-impedance blocking state. This massive, near-instantaneous change in current (di/dt) translates into a frequency-domain comb of harmonics, making the SRD the foundational component in microwave frequency multipliers, comb generators, and picosecond pulse generators.

Symbol, Pinout, and the "Snap" Mechanism

On a schematic, the SRD symbol resembles a standard diode: a triangle pointing toward a vertical cathode bar. However, to denote its unique charge-storage behavior, the cathode bar typically features a small right-angle "kink" or step bent backward toward the anode. The device has two pins: the Anode (A) and the Cathode (K).

The magic of the SRD lies in its doping profile. It is usually a P-I-N structure or an abrupt P-N junction with a very long minority carrier lifetime (τ). When you forward-bias the diode, holes and electrons are injected into the drift region and stored there. When the RF drive signal swings negative (reverse bias), the diode does not immediately block current. Instead, it conducts in the reverse direction, sweeping the stored charge back out. It acts like a short circuit until the very last of the stored charge is removed. Once the charge hits zero, the depletion region expands instantly, and the diode snaps open. According to Microwaves101's guide on Step Recovery Diodes, this transition time (tt) can be as fast as 10 to 50 picoseconds, generating usable harmonic energy well into the 20 GHz range.

Operation Regions and Core Specifications

Designing with an SRD requires understanding its four distinct operational phases during a single RF cycle. The table below maps these regions to the typical voltages and currents you will see on the bench.

SRD Operation Regions During an RF Cycle
Operation Region Bias Condition Typical Voltage / Current Physical State & Purpose
Forward Injection DC Forward Bias + RF Positive Swing +0.7V to +1.2V / +10 to +50 mA Injects and stores minority carriers in the drift region. Sets the total charge packet.
Reverse Conduction RF Negative Swing (Pre-Snap) -0.2V to -2.0V / -5 to -30 mA Sweeps stored charge out. Diode remains low impedance (acts like a closed switch).
Snap Transition Charge Depletion Point dV/dt > 10V/ns Abrupt cut-off. Generates the high-frequency harmonic shockwave.
Reverse Blocking Reverse Bias (Post-Snap) -5V to -20V / <1 µA (Leakage) High impedance. Diode acts as a small parasitic capacitor (CT) until the next cycle.

When selecting a part, you must look beyond standard rectifier specs. The transition time and minority carrier lifetime dictate your maximum usable harmonic frequency. Below is a comparison of two industry-standard SRDs.

Datasheet Specifications: Surface Mount vs. Axial SRDs
Parameter Symbol MACOM MMD830 (SMT) HP/Keysight 5082-3577 (Axial)
Transition Time tt 40 ps (Typical) 70 ps (Typical)
Minority Carrier Lifetime τ 15 ns 30 ns
Total Capacitance (at -10V) CT 0.45 pF 0.70 pF
Reverse Breakdown Voltage VBR -25V Min -35V Min
Max Continuous Forward Current IF 100 mA 200 mA

Safe Default Part Numbers and Biasing Strategy

If you are prototyping a frequency multiplier or a time-domain reflectometry (TDR) pulse generator, do not attempt to use fast-switching Schottky diodes or standard 1N4148s; they lack the charge-storage physics required for a clean snap. Stick to proven RF SRDs.

Safe Default Part Numbers:
  • MACOM MMD830 Series: The modern standard for surface-mount designs up to 20 GHz. Excellent thermal dissipation when soldered to a grounded microstrip pad.
  • HP/Agilent 5082-3500 Series (e.g., 5082-3577): The classic axial-lead workhorse. You can still find these on RF Cafe's archive of HP datasheets or via surplus suppliers. Ideal for through-hole comb generators up to 4 GHz.
  • Cobham MMD840: A higher-power variant suitable for high-level comb generation where +20 dBm of RF drive is required.

How to Bias and Select:
Biasing an SRD is a balancing act between the DC forward current (IF) and the RF drive power. The DC forward current determines the total stored charge (Qs = τ × IF).

  • For lower-order harmonics (e.g., 500 MHz to 2 GHz): Use a higher forward bias (30–50 mA). This stores more charge, resulting in a wider current pulse and higher energy in the lower harmonics.
  • For higher-order harmonics (e.g., 10 GHz to 20 GHz): Use a lower forward bias (5–15 mA). Less stored charge means the diode snaps faster and harder, pushing the harmonic roll-off further into the microwave spectrum.

The RF drive signal must be large enough to sweep the stored charge out within a fraction of the RF period. A good rule of thumb is to set the RF input power between +10 dBm and +17 dBm, depending on the diode's power rating.

Complete Application Circuit: 100 MHz to 1 GHz Comb Generator

Below is a practical, buildable design for a 10th-order comb generator that takes a 100 MHz OCXO (Oven-Controlled Crystal Oscillator) reference and generates a 1 GHz microwave output. This topology is widely used in PLL synthesizers and frequency counters.

Bill of Materials & Component Values:

  • D1 (SRD): MACOM MMD830
  • C1 (DC Block): 100 pF, 0402 NP0/C0G ceramic capacitor
  • L1 (Bias/RF Choke): 220 nH, high-Q air-core or multilayer chip inductor
  • R1 (Bias Stabilizer): 10 Ω, 0402 thin-film resistor (placed in series with the DC bias line to dampen parasitic ringing)
  • C2 (Output Tuning): 2.2 pF, 0402 NP0/C0G
  • L2 (Output Resonator): 5.6 nH, air-core chip inductor (forms a parallel LC tank tuned to 1 GHz)
  • Substrate: Rogers RO4350B (0.020" thickness) for controlled 50 Ω microstrip impedance.

Numbered Build and Bias Procedure

  1. Input Matching: Route the 100 MHz RF input through a 50 Ω microstrip line. Place C1 (100 pF) in series to block any DC from the oscillator stage from interfering with the SRD bias point.
  2. Inject DC Bias: Connect L1 (220 nH) and R1 (10 Ω) from a regulated +5V DC supply to the anode side of the SRD. The inductor acts as an RF choke, preventing the 100 MHz signal from escaping into the power supply, while providing the necessary 20 mA forward bias to the anode.
  3. SRD Placement: Solder the MMD830 directly between the microstrip line and a low-inductance ground via fence. Critical layout note: The cathode must be grounded with multiple vias placed as close to the pad as physically possible. Any parasitic cathode inductance will degrade the di/dt edge and ruin your high-frequency harmonic output.
  4. Output Filter Network: Connect C2 (2.2 pF) and L2 (5.6 nH) in a parallel resonant configuration at the cathode/output node. This LC tank acts as a bandpass filter, suppressing the 100 MHz fundamental and lower harmonics, while passing the 1 GHz (10th harmonic) energy to the 50 Ω output load.
  5. Verify and Tune: Apply +13 dBm of 100 MHz RF drive. Set the DC bias supply to deliver exactly 20 mA. Connect a spectrum analyzer to the output. You should see a 1 GHz signal at approximately -10 dBm to -5 dBm. If the 1 GHz amplitude is low, slightly adjust the DC bias current (±5 mA) to optimize the charge packet width for your specific PCB parasitics.

Failure Modes and Multimeter Testing

SRDs operate under extreme electrical stress. The combination of high di/dt, significant RF drive, and DC forward current makes them susceptible to specific failure modes.

Common Failure Modes:
  • Thermal Runaway (Short Circuit): If the DC forward bias is set too high without adequate RF drive to sweep the charge, the diode dissipates massive heat during the reverse conduction phase. The junction melts, resulting in a dead short between anode and cathode.
  • Avalanche Breakdown (Open or Short): If the peak reverse RF voltage exceeds the VBR rating (e.g., >25V for the MMD830), the diode avalanches. Unlike robust TVS diodes, SRDs are not designed to absorb avalanche energy and will typically punch through the die, failing open or short.
  • Parasitic Oscillation: Poor PCB grounding at the cathode can cause the diode's junction capacitance to resonate with the lead inductance, causing high-frequency parasitic oscillation that eventually destroys the junction.

How to Test an SRD with a Multimeter:
You can verify the basic health of the PN junction using a standard digital multimeter (DMM). Set your DMM to the "Diode Test" mode.

  1. Forward Bias Test: Place the red probe on the Anode and the black probe on the Cathode. A healthy SRD will read between 0.500V and 0.750V. (Note: This is slightly higher than a standard Schottky, but similar to a silicon switching diode).
  2. Reverse Bias Test: Swap the probes (black on Anode, red on Cathode). The DMM should display "OL" (Over Limit) or an open circuit.
  3. Shorted Junction: If both directions read near 0.000V or beep continuously, the diode has suffered thermal failure and must be replaced.

The Multimeter Caveat: A DMM only tests the static PN junction. It cannot verify the transition time (tt) or the snap recovery characteristic. An SRD can pass a DMM diode test perfectly but still fail to generate harmonics if the minority carrier lifetime has degraded due to prolonged thermal stress. To truly verify the "snap" performance of an SRD on the bench, you must test it in-circuit using a sampling oscilloscope or Time Domain Reflectometer (TDR) with a minimum bandwidth of 10 GHz to observe the picosecond step edge.