When drafting or analyzing a short circuit circuit diagram, the objective is rarely just to depict a fault; it is to design a topology that survives one. A dead short (0Ω load) on an unprotected DC bench supply will either trip the supply's internal breaker, melt your breadboard traces, or destroy the pass element. To prevent this, we use a constant-current limiting topology. The direct answer for a robust, hobbyist-friendly protection scheme is a discrete BJT current limiter using an NPN pass transistor and an NPN sense transistor. This configuration clamps the output current to a precise threshold, dissipating the excess voltage as heat in a controlled manner rather than allowing runaway current.
Topology Breakdown: The Discrete BJT Current Limiter
This topology relies on negative feedback to regulate current. Unlike a simple series resistor, which drops voltage proportionally to load current, this active circuit maintains a constant current limit regardless of how low the load resistance drops.
Node Labels and Signal Path
- Node A (Vin): Unregulated DC input (e.g., 12V from a bench supply).
- Node B (Vout): The protected output node connected to the load.
- Node C (Sense): The junction between the pass transistor emitter and the sense resistor.
- Node D (GND): Common ground return for the load and the sense network.
The core mechanism hinges on the base-emitter voltage ($V_{BE}$) of the sense transistor (Q2). When the voltage drop across the sense resistor (R1) reaches approximately 0.6V, Q2 turns on. This steals base drive current from the pass transistor (Q1), forcing Q1 out of saturation and into its linear region, thereby clamping the output current.
Component Selection and Behavior Matrix
Let's design a limiter for a 12V input that clamps at exactly 500mA. We need real component values to ensure the circuit survives the thermal stress of a dead short.
| Component | Part Number / Value | Rating / Rationale |
|---|---|---|
| Q1 (Pass) | TIP31C (NPN BJT) | $V_{CEO}$=100V, $I_C$=3A, $P_D$=40W (with heatsink) |
| Q2 (Sense) | 2N3904 (NPN BJT) | General purpose, $V_{BE(on)}$ ≈ 0.6V at low current |
| R1 (Sense) | 1.2Ω Resistor | 2W rating. ($0.6V / 0.5A = 1.2\Omega$; $P = I^2R = 0.3W$) |
| R2 (Bias) | 1kΩ Resistor | 1/4W. Provides base current to Q1 and Q2. |
| Heatsink | TO-220 Clip-on (15°C/W) | Mandatory for sustained short-circuit testing. |
Behavior Under Load Extremes
Understanding what changes when the load element varies is critical for predicting circuit behavior. The table below maps the exact voltages, currents, and power dissipations across different load states.
| Load State | $R_{load}$ (Ω) | $V_{out}$ (V) | $I_{out}$ (mA) | Q1 $V_{CE}$ (V) | Q1 Dissipation (W) |
|---|---|---|---|---|---|
| Open Circuit | ∞ | 11.4 | 0 | 0.6 | 0.00 |
| Nominal Load | 22.0 | 11.0 | 500 | 1.0 | 0.50 |
| Heavy Load | 10.0 | 5.0 | 500 | 7.0 | 3.50 |
| Dead Short | 0.05 | 0.025 | 500 | 11.9 | 5.95 |
Note: If R1 (sense resistor) drifts +10% due to thermal heating, the limit threshold drops to ~454mA. If Q2's $V_{BE}$ drops due to ambient heat (−2mV/°C), the current limit will slightly increase.
Why This Topology Over a Standard LDO or Fuse?
You might wonder why we build a discrete short circuit circuit diagram when integrated LDOs (like the LM7805) or resettable fuses exist. The answer lies in recovery behavior and precision.
| Criteria | Discrete BJT Limiter | Standard LDO (LM7805) | PPTC Resettable Fuse |
|---|---|---|---|
| Short-Circuit Response | Immediate constant-current clamp | Thermal shutdown (hiccup mode) | Slow thermal trip (seconds) |
| Recovery from Short | Instantaneous upon load removal | Delayed (must cool below 125°C) | Slow (minutes to reset) |
| Current Precision | High (±5% with 1% resistor) | Fixed by internal limit | Poor (trips at 2x rated current) |
| Series Resistance | Very low (only $R_{DS(on)}$ / $V_{CE(sat)}$) | Moderate | High (adds 0.5Ω - 2.0Ω) |
According to Texas Instruments application notes on linear regulator behavior, standard LDOs entering thermal shutdown can exhibit erratic output voltage spikes during the cooling phase, which is unacceptable for sensitive microcontroller loads. The discrete BJT topology maintains a rock-steady clamped current without oscillating.
Breadboard Testing: Safely Simulating a Dead Short
Testing a short circuit intentionally requires a methodical approach to avoid melting your breadboard's plastic contacts or destroying your multimeter's internal fuse. Follow these exact steps.
- Prepare the Bench Supply: Set your bench power supply to 12.0V. Crucially, set the supply's own current limit to 1.0A. This acts as a secondary safety net in case your breadboard wiring fails.
- Wire the Bias and Pass Network: Connect Node A (12V) to one end of R2 (1kΩ). Connect the other end of R2 to the Base and Collector of Q1 (TIP31C). Connect Q1's Emitter to Node C.
- Wire the Sense Network: Connect R1 (1.2Ω 2W) between Node C and Node D (GND). Connect the Base of Q2 (2N3904) to Node C. Connect Q2's Emitter to Node D, and Q2's Collector to the Base of Q1.
- Instrument the Output: Connect a digital multimeter (DMM) in voltage mode across Node B and Node D. Connect a second DMM in current mode (10A unfused port preferred) in series with the load path.
- Verify Nominal Operation: Connect a 22Ω load resistor. Power on the supply. You should read ~11V and ~500mA. If current is zero, check Q2's orientation (pinout is E-B-C for 2N3904 flat-side facing you).
- Execute the Short Test: Remove the 22Ω resistor. Take a thick, insulated 18 AWG copper wire and briefly touch it across Node B and Node D.
Thermal Warning: At a dead short, Q1 will dissipate nearly 6W. A TO-220 package without a heatsink will reach 150°C junction temperature in under 15 seconds, potentially melting the breadboard contacts. Attach a clip-on heatsink to Q1 before holding the short for more than 3 seconds.
- Observe and Record: During the short, the voltage DMM should drop to near 0V (e.g., 0.025V), and the current DMM should hold steady at 500mA. Remove the short; voltage should instantly snap back to 11.4V.
Failure Modes: What Breaks at the Extremes?
A robust design anticipates how the circuit fails when components degrade or wiring faults occur. As detailed in semiconductor theory regarding current mirrors and limiters, the feedback loop is only as strong as its weakest node.
Edge Case 1: Q2 Base-Emitter Short
If Q2 suffers an internal base-emitter short (or if a solder bridge occurs on a PCB), the base drive to Q1 is permanently shorted to ground. Result: The output current drops to zero. The circuit fails 'safe' (open), but the load loses power entirely.
Edge Case 2: R1 (Sense Resistor) Opens
If the 1.2Ω sense resistor fails open due to a massive transient overcurrent event, Node C is no longer referenced to ground through R1. Q2's base-emitter junction will never see 0.6V. Result: The current limiting function is defeated. Q1 will saturate, and the full short-circuit current of the bench supply will flow through the load, likely destroying the load and Q1.
Edge Case 3: Q1 Thermal Runaway
BJTs suffer from a negative temperature coefficient; as they heat up, their $V_{BE}$ requirement drops, and leakage currents increase. If Q1 is not properly heatsinked during a prolonged short, its junction temperature will spike. Even if Q2 is clamping the base drive, Q1's internal thermal leakage can cause the output current to creep upward from 500mA to 700mA or more, eventually leading to secondary breakdown. Fix: Always use a heatsink rated for at least 10°C/W for continuous short-circuit survival.
By understanding the node interactions, selecting components based on real thermal dissipation limits rather than just peak ratings, and testing with deliberate instrumentation, you transform a theoretical short circuit circuit diagram into a bulletproof bench tool.
