Topology and Node Mapping for Series Parallel AC Networks

A series parallel AC network combines series and parallel impedances within the same circuit, requiring complex phasor math to resolve total impedance. Unlike pure DC circuits where resistances simply add or divide, AC networks must account for phase angles introduced by inductors and capacitors. The most practical bench topology for exploring this is a series resistor-inductor (R-L) branch placed in parallel with a standalone capacitor (C) branch. This configuration is foundational for power factor correction, bandpass filtering, and impedance matching.

For this design, we define two primary nodes: Node A (the high-side AC source terminal) and Node B (the low-side return or ground). Branch 1 connects Node A to Node B through a series combination of R1 and L1. Branch 2 connects Node A directly to Node B through C1. According to All About Circuits, resolving this topology requires converting series branch impedances into parallel admittances before summing them.

Topology and Impedance Map (1kHz Source)
Branch / Path Components Node Path Impedance (Z) Formula Phase Characteristic
Branch 1 (Series) R1 (100Ω), L1 (10mH) Node A → R1 → L1 → Node B Z1 = R + jωL Current lags voltage (Inductive)
Branch 2 (Parallel) C1 (4.7µF) Node A → C1 → Node B Z2 = 1 / (jωC) = -j / (ωC) Current leads voltage (Capacitive)
Total Network Branch 1 || Branch 2 Source across Node A & B Z_total = 1 / (Y1 + Y2) Depends on dominant reactive branch
Source Feed Function Generator Generator Out → Node A Z_source (typically 50Ω) Reference phase (0°)

Behavior Matrix and Failure Mode Contrast

Why choose this series-parallel topology over a pure series or pure parallel RLC circuit? A pure series RLC circuit forces the exact same current through all components, meaning the resistor limits the peak resonant current globally, which lowers the Q-factor of the entire tank. A pure parallel RLC circuit risks catastrophic branch overcurrents at resonance because the reactive branches act independently. By placing the resistor in series only with the inductor, we damp the inductive branch to prevent high-voltage spikes while allowing the capacitive branch to supply unrestricted reactive compensation. This is exactly how industrial power factor correction banks are damped to avoid harmonic resonance with the grid.

Understanding what breaks at the extremes is critical for troubleshooting. Below is the failure-mode contrast for our specific network.

Element Failure Behavior Matrix
Element Changed Effect on Total Impedance Effect on Phase Angle Physical Failure Mode Consequence
R1 Fails Open Z_total drops to Z2 (only C1 remains) Shifts hard to -90° (purely capacitive) Inductive branch dies. Circuit draws maximum leading current from source. No thermal risk to C1 unless voltage exceeds rating.
L1 Fails Short Z1 drops to just R1 (100Ω). Z_total shifts. Branch 1 becomes purely resistive (0°). Total angle shifts toward capacitive. Inductive reactance vanishes. Branch 1 current spikes, limited only by R1. R1 may overheat if continuous power exceeds 1/4W rating.
C1 Fails Open Z_total rises to Z1 (only R1+L1 remains) Shifts hard to positive (purely inductive lagging) Reactive compensation is lost. Total current drops. The circuit behaves as a standard series RL low-pass filter.
C1 Fails Short Z_total drops to ~0Ω (dead short across Node A/B) Phase angle becomes undefined (pure resistance of wires) Catastrophic failure. Source overcurrent protection trips immediately. If unprotected, PCB traces melt or function generator output stage fries.

Design Walkthrough: Sizing Real Components for 1kHz

To breadboard this safely without dealing with lethal 120V/240V mains voltages, we will design for a 1kHz, 12V peak-to-peak (4.24V RMS) signal from a standard bench function generator. At 1kHz, component sizes remain physically small and safe for standard jumper wires.

Component Selection:

  • R1: 100Ω, 1/4W carbon film resistor (e.g., Yageo CFR-25JB-52-100R). Provides adequate damping without starving the circuit of current.
  • L1: 10mH radial shielded inductor (e.g., Bourns 78FR10K). Shielding prevents magnetic coupling to nearby breadboard traces.
  • C1: 4.7µF metallized polypropylene film capacitor (e.g., WIMA MKP10). Never use standard aluminum electrolytic capacitors for AC networks; their internal dielectric breaks down under reverse polarity. Film capacitors handle bipolar AC waveforms natively.
Callout Tip: The Phasor Math
At f = 1000 Hz, angular frequency ω = 2π(1000) ≈ 6283 rad/s.
Inductive reactance (X_L) = ωL = 6283 × 0.01 = 62.83Ω.
Capacitive reactance (X_C) = 1 / (ωC) = 1 / (6283 × 4.7e-6) = 33.86Ω.
Branch 1 Impedance (Z1) = 100 + j62.83Ω. Magnitude = 118.1Ω. Phase = +32.1°.
To find total impedance, convert Z1 to admittance (Y1 = 1/Z1 = 0.00716 - j0.00449 S).
Branch 2 Admittance (Y2) = 1 / (-j33.86) = +j0.0295 S.
Total Admittance (Y_total) = Y1 + Y2 = 0.00716 + j0.0250 S.
Total Impedance (Z_total) = 1 / Y_total. Magnitude ≈ 38.4Ω. Phase ≈ -74° (Net capacitive).
For deeper mathematical proofs, refer to the AC Impedance tutorials at Electronics-Tutorials.ws.

With a 4.24V RMS source and a total impedance of 38.4Ω, the total RMS current drawn from the generator will be approximately 110mA. This is well within the 500mA output limit of most modern benchtop function generators like the Rigol DG1000Z series.

Breadboard Testing and Verification Steps

Testing AC networks requires observing both amplitude and phase. A standard multimeter will only give you RMS voltage; it cannot show you the phase shift between the resistive and reactive branches. You need an oscilloscope.

  1. Prep the Source: Set your function generator to a sine wave, 1kHz frequency, 12Vpp amplitude, with a 0V DC offset. Connect the BNC-to-alligator clip cable to your breadboard rails. Do not energize the rails yet.
  2. Build Branch 1 (Series R-L): Insert R1 into row 10, spanning the center ditch. Connect one leg of L1 to the same row as R1's output leg. Connect the other leg of L1 to the ground rail (Node B). Connect R1's input leg to the high-side rail (Node A).
  3. Build Branch 2 (Parallel C): Insert C1 into row 15. Connect one leg to the high-side rail (Node A) and the other leg to the ground rail (Node B). Ensure C1 is physically separated from L1 to avoid parasitic magnetic coupling.
  4. Insert a Current Shunt: To measure total current phase, break the ground return path (Node B) and insert a 10Ω precision shunt resistor in series with the main ground return. This converts the total current into a measurable voltage (V = IR) without significantly altering the 38.4Ω total impedance.
  5. Probe the Circuit: Connect Oscilloscope Channel 1 across Node A and Node B (Source Voltage). Connect Channel 2 across the 10Ω shunt resistor (Total Current). Set both channels to AC coupling, 2V/div, and trigger on Channel 1 rising edge.
  6. Energize and Verify: Turn on the function generator output. You should see two sine waves. Because the net impedance is capacitive (-74°), the current waveform (Channel 2) should visibly lead the voltage waveform (Channel 1) by roughly 200 microseconds at 1kHz. Use the scope's cursor function to measure the exact time delta and calculate the phase angle: Phase = (Time Delta / Period) × 360°.
  7. Induce a Failure Mode: Pull C1 from the breadboard while the circuit is live. Observe the scope. The phase shift will instantly flip, and the current waveform will now lag the voltage waveform, confirming the circuit has reverted to a purely inductive series R-L state.

By mapping the nodes, calculating the complex admittances, and verifying the phase shift on a scope, you move beyond abstract textbook theory and gain practical intuition for how reactive components interact in mixed topologies. Always verify component voltage ratings and power dissipations before scaling these bench values up to line-voltage applications.