A "series of parallel" circuit connects parallel component blocks in series to achieve a target equivalent resistance while multiplying power dissipation capability and adding fault tolerance. If you need a 10Ω, 40W dummy load to test a power supply but only have standard 10Ω, 10W resistors on hand, you wire two parallel pairs in series. This topology guarantees that if one resistor fails open, the remaining three reconfigure to 13.3Ω—dropping the current safely—whereas a pure parallel or pure series array would either dead-short the supply or break the circuit entirely.

Topology Breakdown: Nodes, Branches, and Equivalent Resistance

To design intentionally, we must map the circuit to specific nodes rather than just looking at a schematic blob. A true series of parallel network consists of distinct parallel blocks daisy-chained together.

Consider a network built from four identical resistors (R1, R2, R3, R4), each with resistance R and power rating P.

  • Node 0 (Input): The positive supply terminal.
  • Node 1 (Midpoint): The junction connecting the first parallel block to the second.
  • Node 2 (Output/Ground): The return terminal.

Block A spans Node 0 to Node 1, containing R1 and R2 in parallel. The equivalent resistance of this block is R/2.
Block B spans Node 1 to Node 2, containing R3 and R4 in parallel. Its equivalent resistance is also R/2.

Because Block A and Block B are in series, the total equivalent resistance (Req) is the sum of the blocks:

Req = (R/2) + (R/2) = R

Total Power Capacity = 4 × P

This is the core advantage: you maintain the exact resistance value of a single component, but you quadruple the thermal mass and power handling capability. For a deeper look at how current divides through these nodes, All About Circuits provides an excellent breakdown of series-parallel current division.

Failure Mode Contrast: What Breaks at the Extremes?

The primary reason to choose a series of parallel topology over a simple series or parallel array is graceful degradation. When pushing components near their thermal limits, failures happen. Here is exactly how the network behaves when a single element fails open or short.

Topology (4 identical resistors) Normal Req One Resistor Fails OPEN One Resistor Fails SHORT
Pure Series 4R Circuit breaks. Req = ∞. Current drops to 0A. Req drops to 3R. Current spikes by 33%.
Pure Parallel R/4 Req rises to R/3. Remaining 3 resistors overheat. Dead short. Req = 0Ω. Supply trips or wires melt.
Series of Parallel R Req rises to 1.5R. Current drops by 33%. Circuit survives. Req drops to R/2. Current doubles, but avoids dead short.
Callout: The Open-Failure Advantage
If R2 fails open in our series of parallel network, Block A transitions from (R || R) to just (R). The total resistance shifts from R to 1.5R. If you are driving this with a constant voltage source, the total current drops. The remaining three resistors actually run cooler than they did in the balanced state, preventing a cascading thermal failure.

Design Walkthrough: Building a 10Ω 40W Dummy Load

Let’s build a practical bench tool: a dummy load to test 12V and 24V DC power supplies. We want a 10Ω target resistance capable of safely dissipating at least 35W continuously.

Component Selection:
We will use four Vishay RH01010R00FE02 wirewound resistors. These are chassis-mount, 10Ω, 10W components with a ±1% tolerance and a flange for heatsinking. Total theoretical power capacity is 40W.

Thermal Derating Reality Check:
A 10W resistor is only 10W if you mount it to a proper heatsink and keep ambient air below 50°C. If you bolt all four side-by-side on a small aluminum plate, they will heat each other up. By using the series of parallel topology, we spread the physical footprint and ensure that even at 60% derating (6W per resistor), the network can still handle 24W safely.

Wiring the Nodes:

  1. Block A: Solder the leads of Resistor 1 and Resistor 2 together at both ends. This creates Node 0 (the free ends) and Node 1 (the joined ends).
  2. Block B: Solder Resistor 3 and Resistor 4 together identically. This creates a second Node 1 and Node 2.
  3. Series Connection: Bridge the Node 1 junction of Block A to the Node 1 junction of Block B using a heavy-gauge bus wire (minimum 14 AWG for low resistance).
  4. Terminals: Attach heavy ring terminals to Node 0 and Node 2 for connection to your power supply binding posts.

For more on calculating power dissipation in complex networks, refer to the resistor network tutorials at Electronics-Tutorials.ws.

Bench Testing Protocol: From Breadboard to Chassis

A common rookie mistake is attempting to prototype high-power loads on a standard solderless breadboard. Breadboard contacts are rated for roughly 1A and will melt the plastic housing if you push 2.4A through them (which is what 24V across 10Ω will do). We use a two-stage verification process.

Stage 1: Low-Power Breadboard Verification

Before cutting heavy wire, prove the math using 1/4W through-hole resistors.

  1. Insert four 10Ω, 1/4W carbon film resistors into a solderless breadboard.
  2. Wire R1 and R2 in parallel (Block A), and R3 and R4 in parallel (Block B).
  3. Wire Block A and Block B in series.
  4. Set your multimeter to resistance mode. Place probes across the main input and output rails. Expected reading: 10.0Ω (±5% depending on component tolerance).
  5. Apply 5V from a bench supply. Expected current: 0.5A. Expected power: 2.5W total (well within the 1W combined limit of the 1/4W parts).

Stage 2: High-Power Thermal Testing

  1. Mount the four Vishay RH010 resistors to an aluminum heatsink using thermal paste and M3 screws.
  2. Connect the heavy-gauge bus wires as detailed in the design walkthrough.
  3. Measure cold resistance with a multimeter. It should read very close to 10.0Ω.
  4. Connect a 12V power supply capable of at least 2A. Turn it on.
  5. Measure the voltage across Node 0 and Node 2, and the current in series. Calculate actual Rhot using Ohm's Law. Wirewound resistors have a low temperature coefficient, so Rhot should remain within 2% of your cold reading.
  6. Run for 15 minutes. Use an IR thermometer to check the heatsink. If it exceeds 80°C, you need a larger heatsink or forced air cooling.

Decision Path: When to Choose Series of Parallel

Not every circuit requires this topology. Use this decision matrix to determine if a series of parallel configuration is the right choice for your design, or if a simpler array will suffice.

Design Requirement Recommended Topology Why?
Need exact R, but require 3x or 4x power handling. Series of Parallel Maintains target resistance while multiplying wattage capacity.
Circuit must survive a single component open-failure without shutting down. Series of Parallel Req shifts gracefully; current drops rather than interrupting.
Need to divide voltage with high redundancy (e.g., ADC scaling). Series of Parallel If one resistor in the upper divider leg fails open, output voltage drops to 0V instead of spiking to full rail voltage and frying the MCU.
Need to increase power handling, but target R is very low (e.g., 0.1Ω shunt). Pure Parallel Series blocks would require impractically low individual resistor values.
Need to drop high voltage, target R is very high (e.g., 1MΩ bleeder). Pure Series Parallel blocks would require impractically high individual resistor values and waste board space.
Default Recommendation:
For any DC dummy load, high-power audio crossover network, or precision high-voltage feedback divider where component failure could damage downstream silicon, default to a series of parallel topology. The slight increase in wiring complexity is vastly outweighed by the thermal headroom and fault tolerance it provides. Pick a standard resistor value that matches your target Req, buy four of them, and wire them as two parallel blocks in series.