RLC Series Circuit Diagram: Design, Behavior Tables, and 5kHz Build

An RLC series circuit diagram maps a single-loop path where a resistor (R), inductor (L), and capacitor (C) are chained end-to-end. Because they share the exact same alternating current, their individual voltage drops dictate the circuit's total impedance. The direct answer for most makers and engineers: use a series RLC topology when you need a bandpass filter that minimizes impedance at resonance, or when you want to exploit voltage magnification across the reactive components for applications like induction heating, RF tuning, or high-voltage signal generation.

Topology, Node Labels, and Parameter Behavior

The standard series RLC topology is a single unbranched loop. Current flows from the AC voltage source ($V_{in}$) through the resistor, then the inductor, then the capacitor, and finally returns to ground. To analyze it on a breadboard or in simulation, we define specific node labels:

• Node 1 (Input): Junction between $V_{in}$ and the Resistor.
• Node 2 (Mid-RL): Junction between the Resistor and the Inductor.
• Node 3 (Mid-LC): Junction between the Inductor and the Capacitor.
• Node 4 (Ground): Junction between the Capacitor and the return path of $V_{in}$.

At the resonant frequency ($f_r$), the inductive reactance ($X_L$) and capacitive reactance ($X_C$) are equal in magnitude but 180 degrees out of phase. They cancel each other out, leaving only the resistance ($R$) to oppose current flow. This results in minimum impedance and maximum current.

Understanding how component tolerances and substitutions affect the circuit is critical. The table below maps the exact behavioral shifts when you alter a single parameter while holding the others constant.

Series vs. Parallel: Why Choose the Series Topology?

A common point of confusion on the bench is choosing between a series RLC and a parallel RLC (tank) circuit. While both resonate at the same mathematical frequency ($f_r = \frac{1}{2\pi\sqrt{LC}}$), their impedance behaviors at resonance are exact opposites. According to Electronics Tutorials, the choice dictates whether your circuit acts as a voltage multiplier or a current flywheel.

Choose the series topology when you need the circuit to draw maximum current from the source at a specific frequency, or when you need to generate a high voltage across the capacitor or inductor from a low-voltage signal source. Choose the parallel topology when you need to block a specific interfering frequency (notch filter) or sustain oscillations with minimal source current.

Design Walkthrough: Building a 5 kHz Series Resonator

Let's move from theory to the workbench. We will design a series RLC bandpass filter targeting a resonant frequency of approximately 5 kHz. We need to select real-world components, accounting for non-ideal parasitics like the inductor's DC resistance (DCR).

1. Verify the Resonant Frequency:
Using the standard formula: $f_r = \frac{1}{2\pi\sqrt{LC}}$
$f_r = \frac{1}{2\pi\sqrt{0.01 \text{ H} \times 100 \times 10^{-9} \text{ F}}} = 5,032.9 \text{ Hz}$

2. Calculate Total Resistance and Q-Factor:
At resonance, the total resistance is the explicit resistor plus the inductor's internal DCR: $R_{total} = 47\Omega + 5.6\Omega = 52.6\Omega$.
The inductive reactance at 5,032 Hz is: $X_L = 2\pi f L = 2 \times \pi \times 5032.9 \times 0.01 = 316.2\Omega$.
The Quality Factor (Q) is: $Q = \frac{X_L}{R_{total}} = \frac{316.2}{52.6} \approx 6.01$.

3. The Voltage Magnification Gotcha:
This is where beginners blow up components. In a series RLC circuit, the voltage across the inductor or capacitor at resonance is equal to $Q \times V_{in}$. If your function generator outputs $2V_{RMS}$, the voltage across the 100nF capacitor will be $6.01 \times 2V = 12.02V_{RMS}$. While this is safe for our 50V Kemet capacitor, if you had chosen a 16V rated capacitor and driven the circuit with 5V, the 30V spike at resonance would instantly punch through the dielectric. Always rate your L and C components for at least $Q \times V_{in(max)}$.

Failure Modes: What Breaks at the Extremes?

When troubleshooting a dead board, you need to know how the circuit behaves when a component fails open or shorts out. Unlike purely resistive networks, reactive failures shift the frequency domain entirely.

• Open R, L, or C: The single loop is broken. Total impedance becomes infinite. Current drops to zero. Node 2 and Node 3 will float or read 0V depending on where your oscilloscope probes are referenced. This is the most common failure mode for cheap inductors subjected to overcurrent.
• Shorted Resistor: This is the most dangerous failure mode. $R_{total}$ drops from 52.6 Ω to just the inductor's 5.6 Ω DCR. The Q-factor spikes from 6.0 to 56.4. If $V_{in}$ is just $2V_{RMS}$, the voltage across the capacitor skyrockets to $112V_{RMS}$. This will violently destroy a 50V MLCC capacitor, often with an audible pop and a short circuit that then blows the function generator's output fuse.
• Shorted Inductor: The circuit degrades into a simple first-order RC high-pass filter. Resonance is eliminated. The -3dB cutoff shifts to $f_c = \frac{1}{2\pi RC} = 33.8 \text{ kHz}$.
• Shorted Capacitor: The circuit degrades into a simple first-order RL low-pass filter. Resonance is eliminated. The -3dB cutoff shifts to $f_c = \frac{R}{2\pi L} = 748 \text{ Hz}$.

Step-by-Step Breadboard Testing Procedure

Simulating with tools like the Falstad Circuit Simulator is great for initial validation, but physical breadboarding introduces parasitic capacitance and ground-loop noise. Follow this exact procedure to characterize the 5 kHz build on the bench.

1. Wire the Loop: Insert the 47 Ω resistor, 10 mH inductor, and 100 nF capacitor in a single continuous series chain on the breadboard. Leave space between the inductor and capacitor to minimize parasitic magnetic coupling.
2. Configure the Source: Set your function generator (e.g., Siglent SDG1032X) to output a sine wave. Set the amplitude to $2V_{PP}$ (which is roughly $0.7V_{RMS}$). Critical: Set the output impedance mode to 'High-Z' in the generator's menu, not 50 Ω, otherwise the generator's internal 50 Ω resistor will add to your circuit's R, lowering the Q-factor and shifting the peak amplitude.
3. Probe the Input: Connect Oscilloscope Channel 1 to Node 1 (Input). Attach the ground clip to the breadboard ground rail (Node 4). Set CH1 to 1V/div.
4. Probe the Output: Connect Oscilloscope Channel 2 to Node 3 (between L and C). Attach the ground clip to the same ground rail. Set CH2 to 5V/div to accommodate the expected voltage magnification.
5. Execute the Sweep: Set the function generator to sweep mode. Configure a logarithmic sweep from 1 kHz to 20 kHz over 10 seconds. Alternatively, manually step the frequency: 1k, 2k, 3k, 4k, 4.5k, 4.8k, 5.0k, 5.2k, 5.5k, 6k, 8k, 10k.
6. Identify the Peak: Watch Channel 2. As you approach 5 kHz, the amplitude will swell. At exactly 5,032 Hz, the CH2 waveform will peak in amplitude and will be exactly 90 degrees out of phase with the CH1 input waveform. Record the peak-to-peak voltage to verify your calculated Q-factor.

By mapping the physical nodes, respecting the voltage magnification inherent to the series topology, and accounting for real-world DCR, you transition from abstract textbook formulas to a predictable, functional RF or audio filter. Always verify your component voltage ratings against the Q-multiplied input voltage before applying power.