You plug your target frequency into an online resonant tank circuit calculator, and it spits out a neat pair of values: 2.53 µH and 100 pF. You order the parts, solder them to a perfboard, and sweep it with your network analyzer. The actual resonant peak is sitting at 11.2 MHz, and the bandwidth is a muddy mess. Why? Because web calculators assume ideal components, and in the real world, parasitic capacitance, equivalent series resistance (ESR), and dielectric absorption will wreck your design if you don't account for them.
This guide cuts through the idealized math. We will design a 13.56 MHz (standard RFID/NFC) parallel LC tank, select exact real-world component part numbers, and walk through the breadboard verification process.
The Short Answer: Sizing Your LC Tank for 13.56 MHz
If you need a 13.56 MHz resonant tank for an RF bandpass filter, Colpitts oscillator, or NFC antenna matching network, use a parallel LC topology with the following real-world values:
- Inductor (L): 2.7 µH (e.g., Coilcraft 1812CS-272X, shielded ferrite core)
- Capacitor (C): 51 pF (e.g., KEMET C0603C510J5GACTU, C0G/NP0 dielectric)
- Calculated Resonant Frequency: 13.56 MHz
- Expected Q-Factor: ~65 (limited by inductor ESR and PCB parasitics)
Series vs. Parallel Topology: The Decision Tree
The fundamental formula for resonance is the same for both topologies: $f_r = \frac{1}{2\pi\sqrt{LC}}$. However, their impedance behaviors at resonance are exact opposites. Here is how to decide which one to build.
| Application Goal | Required Impedance at $f_r$ | Topology Pick | Why This Wins |
|---|---|---|---|
| RF Oscillator (Colpitts/Clapp) | Maximum (High Z) | Parallel | High impedance at resonance provides the necessary positive feedback gain without loading the active device. |
| Bandpass Filter / Antenna Match | Maximum (High Z) | Parallel | Passes the target frequency while shunting out-of-band signals to ground (when used in a shunt configuration). |
| Notch Filter (Band-Stop) | Minimum (Low Z) | Series | Creates a dead-short at the target frequency, absorbing the signal when placed in parallel with the load. |
| Induction Heating / Wireless Power | Minimum (Low Z) | Series | Allows massive circulating currents to flow through the work coil with minimal driving voltage. |
The Default Recommendation: For 90% of hobbyist and bench RF designs (oscillators, IF filters, and receiver front-ends), the parallel LC tank is the correct choice. The rest of this article assumes a parallel topology.
Topology Deep-Dive: The Parallel LC Tank
In a parallel tank, the inductor and capacitor share the same two nodes. Let's define the circuit:
- Node A (Top/Input): The junction where the RF signal enters, and where one leg of L and one leg of C connect.
- Node B (Bottom/Ground): The common return path where the other legs of L and C connect.
At DC, the inductor acts as a short circuit (Node A to Node B). At infinite frequency, the capacitor acts as a short. But exactly at $f_r$, the reactive currents cancel out, and the circuit presents a purely resistive, very high impedance (limited only by the parasitic ESR of the components).
Behavior Table: What Changes When You Tweak a Parameter
| Parameter Changed | Effect on Resonant Frequency ($f_r$) | Effect on Q-Factor | Real-World Consequence |
|---|---|---|---|
| Increase L | Decreases | Decreases (usually) | More wire turns mean higher DC resistance (ESR), which broadens the bandwidth and lowers peak impedance. |
| Increase C | Decreases | Increases | Larger C lowers the L/C ratio, reducing circulating current and making the tank less sensitive to parasitic PCB capacitance. |
| Increase ESR (Inductor) | No change | Decreases severely | The tank becomes 'lossy'. The -3dB bandwidth widens, ruining selectivity in filters and preventing oscillation startup. |
| Add PCB Parasitic C | Decreases | Slight decrease | This is why your calculator lied. A breadboard adds 2-5 pF of stray capacitance between rows, shifting a 13.56 MHz peak down to ~12.8 MHz. |
Component Selection and the 'Calculator' Reality Check
Let's look at why we picked the Coilcraft 1812CS-272X and a 51 pF C0G capacitor, rather than just grabbing random parts from a bin.
An ideal resonant tank circuit calculator will tell you that for 13.56 MHz, you can use 25.3 µH and 5.4 pF, or 0.25 µH and 540 pF. Mathematically, they all yield 13.56 MHz. Practically, they are disasters.
- The High-L / Low-C Trap (25.3 µH / 5.4 pF): A 25 µH inductor requires many turns of thin wire, resulting in high ESR and terrible Q. Furthermore, 5.4 pF is so small that the 3 pF of stray capacitance from your PCB traces and breadboard will detune the circuit by 30%.
- The Low-L / High-C Trap (0.25 µH / 540 pF): A 0.25 µH inductor is essentially just a bent piece of wire with near-zero ESR, which sounds great for Q. But to pass the massive circulating currents between L and C at resonance, your 540 pF capacitor must have an incredibly low ESR, or it will overheat and fail. Finding a 540 pF C0G capacitor with high current handling is expensive and physically large.
The Sweet Spot: We chose 2.7 µH and 51 pF. The 1812CS inductor has a self-resonant frequency (SRF) of 80 MHz (well above our 13.56 MHz target, ensuring it still acts like an inductor) and an ESR of roughly 0.8 ohms. The 51 pF C0G capacitor has an ESR in the milliohm range. This yields a practical, buildable Q of around 65 on a standard FR4 board.
Failure Modes: What Breaks at the Extremes?
When debugging a dead RF board, you need to know how the tank fails. Here is the failure-mode contrast for a parallel topology:
1. The Capacitor Shorts (Node A to Node B)
What happens: The tank loses all resonant behavior. The inductor is now just a low-value resistor (its DC wire resistance, typically < 2 ohms) connected directly across your RF source or DC bias rail.
The damage: If your circuit includes a DC bias (like a transistor collector tied to Node A through an RF choke), a shorted tank capacitor will pull the rail to ground, likely burning out the inductor's thin internal wire or destroying the driving transistor.
2. The Inductor Opens (Broken internal wire or bad solder joint)
What happens: The current path through the inductor is broken. The circuit is now just a 51 pF capacitor to ground.
The damage: At 13.56 MHz, a 51 pF capacitor has an impedance of about 230 ohms. It won't draw destructive DC current, but your circuit will pass high frequencies indiscriminately, destroying the selectivity of your filter or killing the gain of your oscillator. The peak simply vanishes from the spectrum analyzer.
3. The Inductor Shorts (Rare, but possible if insulation melts)
What happens: Turns of the coil bridge together. The inductance drops drastically (e.g., from 2.7 µH to 0.5 µH).
The damage: The resonant frequency shoots up (in this case, to ~31 MHz). Your circuit will appear 'dead' at the target frequency because the peak has moved out of band.
Breadboard Testing: Step-by-Step Verification
Do not trust the math until you have swept the physical circuit. You will need a Vector Network Analyzer (VNA) like a NanoVNA V2 or LibreVNA, and two SMA-to-alligator-clip cables.
- Calibrate the VNA: Perform a full Short-Open-Load (SOL) calibration at the end of your SMA cables. If you skip this, the cable's own capacitance will skew your Q-factor measurements.
- Connect the Tank: Clip the VNA's Channel 0 (S11 reflection) leads directly across Node A and Node B of your parallel LC tank. Keep the clip leads as short as physically possible; long alligator clips add series inductance.
- Set the Sweep Range: Configure the NanoVNA to sweep from 10 MHz to 20 MHz. Set the trace format to 'Smith Chart' or 'Log Magnitude' (Return Loss / S11).
- Find the Peak: Look for the deepest dip in the Log Magnitude trace (or the point where the Smith Chart trace crosses the real axis). Note the marker frequency. If it reads 12.9 MHz instead of 13.56 MHz, your breadboard is adding ~4 pF of parasitic capacitance. This is normal.
- Measure the -3dB Bandwidth: Drop the markers down 3dB from the peak frequency. Record the lower frequency ($f_1$) and upper frequency ($f_2$).
- Calculate Real Q: Use the formula $Q = \frac{f_{peak}}{f_2 - f_1}$. If your peak is 13.0 MHz and your -3dB points are 12.8 MHz and 13.2 MHz, your bandwidth is 0.4 MHz. $Q = 13.0 / 0.4 = 32.5$. If this is lower than your design target, swap the inductor for one with a higher SRF and lower ESR, or move the circuit off the breadboard and onto a soldered perfboard to reduce stray parallel capacitance.
For deeper dives into component parasitics and Q-factor measurements, the Coilcraft Q-Factor guide provides excellent empirical data on how core materials affect high-frequency losses. Additionally, the foundational theory on parallel tank impedance can be reviewed in the Electronics Tutorials parallel resonance section.
By treating the resonant tank circuit calculator as a starting point rather than a final answer, and by rigorously selecting C0G dielectrics and high-SRF inductors, you will build RF circuits that actually perform to spec on the bench.
