The resonant frequency of an RLC circuit is the exact point where inductive reactance ($X_L$) and capacitive reactance ($X_C$) cancel each other out, leaving only the resistive component to limit current or dictate impedance. For a series configuration, this is calculated as $f_r = \frac{1}{2\pi\sqrt{LC}}$. At this frequency, the circuit exhibits pure resistance, maximum current (in series), and a predictable phase angle of zero degrees. Understanding this isn't just an academic exercise; it is the foundation for designing RF filters, impedance matching networks, and induction heating drivers.
In this guide, we will move past abstract textbook formulas and design a physical 10 kHz series RLC bandpass filter using off-the-shelf components, analyze how the circuit behaves when pushed to its extremes, and walk through a bench-verification procedure.
Series vs. Parallel Topologies: Why Choose Series?
Before breadboarding, you must choose your topology. The two primary configurations are series and parallel RLC circuits, and they behave as exact duals of one another at resonance.
- Series RLC: Components share the same current. At resonance, impedance drops to its minimum (equal to R). It acts as a bandpass filter (if measuring voltage across R) or a notch filter (if measuring across L and C). It is driven by a voltage source.
- Parallel RLC: Components share the same voltage. At resonance, impedance spikes to its maximum. It acts as a bandstop (notch) filter when placed in series with a signal, or a bandpass when used as a shunt. It is driven by a current source (or a voltage source with a high series resistance).
For most hobbyist and bench-level signal processing tasks, the series RLC topology is vastly superior. Standard function generators and microcontroller DACs are voltage sources with low output impedance (typically 50 Ω). A series RLC circuit interfaces directly with these low-impedance sources without requiring buffering. Furthermore, measuring the bandpass response across the series resistor keeps your oscilloscope ground referenced to the circuit ground, avoiding the floating differential measurements required when probing the inductor or capacitor in a parallel tank circuit.
Component Behavior Matrix and Extreme Failure Modes
When tuning the resonant frequency of an RLC circuit, adjusting one component rarely affects just the center frequency. It cascades into the Quality factor (Q) and the bandwidth (BW). The table below maps exactly what happens when you alter component values, alongside the catastrophic failure modes you must design for.
| Parameter Changed | Direction | Effect on Resonant Freq ($f_r$) | Effect on Q-Factor | Extreme Failure Mode (Short / Open) |
|---|---|---|---|---|
| Inductance (L) | Increase | Decreases ($1/\sqrt{L}$) | Increases ($\sqrt{L}$) | Short: $f_r$ shifts to max limit, Q crashes. Open: Circuit broken, 0V output. |
| Capacitance (C) | Increase | Decreases ($1/\sqrt{C}$) | Decreases ($1/\sqrt{C}$) | Short: Passes DC, destroys bandpass shape. Open: Circuit broken, 0V output. |
| Resistance (R) | Increase | No Change | Decreases ($1/R$) | Short: Q approaches infinity (theoretical), massive circulating currents. Open: 0V output. |
| Parasitics (Stray C) | Increase | Decreases slightly | Degrades high-freq response | N/A: Causes anti-resonance spikes above $f_r$ due to inductor self-capacitance. |
Notice that changing the resistor does not alter the resonant frequency of an RLC circuit. It only dictates the damping. However, if your inductor's wire shorts internally (turn-to-turn fault), the inductance plummets, violently shifting $f_r$ upward and destroying the filter's Q. For reliable designs, always specify inductors with a current rating well above your calculated peak resonant current.
Design Walkthrough: A 10 kHz Series RLC Bandpass Filter
Let's design a series RLC bandpass filter targeting a center frequency of roughly 10 kHz. We will define our nodes and select real, purchasable components rather than idealized textbook numbers.
Topology and Node Labels
- Vin: AC signal input from the function generator.
- Node A: Junction between the Inductor (L1) and Capacitor (C1).
- Node B: Junction between the Capacitor (C1) and Resistor (R1).
- Vout: Measured across R1 (between Node B and GND).
- GND: Common ground reference for Vin, Vout, and the scope.
Selecting Real Component Values
First, we pick the capacitor. We need a stable dielectric. Avoid X7R or Y5V ceramics, which exhibit severe capacitance loss under DC bias and microphonic noise. We select a 10 nF (0.01 µF) C0G/NP0 ceramic capacitor (e.g., Kemet C315C103J1G5TA).
Next, we calculate the required inductance using the rearranged resonance formula:
$L = \frac{1}{4 \pi^2 f_r^2 C}$
$L = \frac{1}{4 \pi^2 (10,000)^2 (10 \times 10^{-9})} \approx 25.33 \text{ mH}$
Since 25.33 mH is not a standard E12 value, we select a 27 mH radial leaded inductor (e.g., Bourns 78FR27K, 5% tolerance). Because we bumped the inductance up, our actual resonant frequency will shift downward. Let's verify the new $f_r$:
$f_r = \frac{1}{2\pi\sqrt{0.027 \times 10 \times 10^{-9}}} \approx 9,686 \text{ Hz}$
Finally, we size the resistor to set our Q-factor. For a moderately sharp filter, let's target a Q of 5.
$Q = \frac{1}{R}\sqrt{\frac{L}{C}} \implies R = \frac{1}{Q}\sqrt{\frac{L}{C}}$
$R = \frac{1}{5}\sqrt{\frac{0.027}{10 \times 10^{-9}}} = \frac{1643}{5} \approx 328.6 \ \Omega$
We select the nearest standard E24 value: 330 Ω (e.g., Vishay MRS25000C3300FRP00).
| Component | Target Value | Selected Part / Spec | Design Role |
|---|---|---|---|
| C1 | 10 nF | Kemet C315C103J1G5TA (C0G, 5%) | Sets baseline timing, blocks DC |
| L1 | 27 mH | Bourns 78FR27K (Radial, 5%) | Tunes $f_r$ to 9.68 kHz |
| R1 | 330 Ω | Vishay MRS25 (1/4W, 1%) | Sets Q ≈ 5, provides Vout tap |
For a deeper theoretical breakdown of how these components interact in the frequency domain, the electronics-tutorials.ws guide on series resonance provides excellent phasor diagrams and impedance curves.
Step-by-Step Breadboard Testing and Verification
Theory assumes ideal components. The breadboard introduces parasitic capacitance (typically 2-5 pF per contact strip) and inductor equivalent series resistance (ESR). Here is how to verify your design on the bench using a standard function generator (e.g., Siglent SDG1032X) and an oscilloscope (e.g., Rigol DS1054Z).
The Verification Sequence
- Wire the Circuit: Insert L1, C1, and R1 in series. Connect the function generator output to the free leg of L1 (Vin). Connect the free leg of R1 to the common ground rail. Connect the ground rail to the generator's ground.
- Probe Vout: Connect your oscilloscope Channel 1 probe across R1 (Node B to GND). Connect Channel 2 to Vin to monitor the input amplitude. Set both probes to 10X attenuation and compensate them using the scope's calibrator square wave.
- Configure the Source: Set the function generator to a sine wave, 2.0 Vpp amplitude, with a 50 Ω output impedance enabled. (Note: The 50 Ω internal impedance of the generator acts in series with your 330 Ω resistor, making your effective R = 380 Ω. This will slightly lower your actual Q to ~4.3. Account for this in high-precision designs by using an op-amp voltage follower buffer).
- Find the Peak: Set the generator frequency to 9.68 kHz. Observe Vout. Slowly sweep the frequency up and down in 10 Hz increments. Note the exact frequency where Vout amplitude reaches its absolute maximum. This is your measured $f_r$.
- Measure the Bandwidth (-3dB Points): Calculate 70.7% of your peak Vout voltage (this is the -3dB point). Sweep the frequency downward until Vout hits this value; record this as $f_L$. Sweep upward past the peak until Vout hits this value again; record this as $f_H$.
- Calculate Actual Q: Use the formula $Q = \frac{f_r}{f_H - f_L}$. Compare this empirical Q against your theoretical Q of 5. Discrepancies are usually caused by the inductor's internal DCR (DC resistance) and the generator's 50 Ω source impedance.
By mapping the physical behavior against the mathematical model, you bridge the gap between textbook theory and bench reality. For more advanced filter topologies and active buffering techniques to eliminate source-impedance loading, refer to All About Circuits' comprehensive chapter on AC resonance. Mastering the resonant frequency of an RLC circuit ultimately comes down to respecting the non-ideal traits of the physical components you pull from your parts bin.
