What is Resistance Transistor Logic (RTL) and Why Build It Today?
Resistance transistor logic (RTL) is the simplest and oldest family of digital logic circuits. It uses resistors as the input network and a bipolar junction transistor (BJT) as the active switching element. While commercial RTL integrated circuits were entirely superseded by Diode-Transistor Logic (DTL), Transistor-Transistor Logic (TTL), and eventually CMOS by the late 1970s, the discrete RTL topology remains highly relevant on the workbench today.
Why build RTL in 2026 when a 74HC00 CMOS chip costs pennies? First, discrete RTL is the foundational building block for custom high-voltage or high-current sensor interfacing where standard 3.3V/5V logic ICs would be destroyed. Second, understanding RTL forces you to master BJT saturation and cutoff regions—knowledge that directly translates to designing robust MOSFET gate drivers and switching power supplies. Finally, building discrete logic gates is a rite of passage for understanding the physical layer of digital abstraction.
RTL Circuit Blueprint: Building a Discrete 2-Input NOR Gate
The fundamental building block of RTL is the NOR gate. By combining multiple transistors with their collectors tied together and pulled up to the supply voltage, we create a wired-OR function at the collector node, which inherently inverts the signal to produce a NOR logic output.
Component Values and Schematic
- Vcc: 5.0V DC (Standard logic supply)
- Rc (Collector Pull-up): 1kΩ, 1/4W metal film
- Rb1, Rb2 (Base Limiters): 47kΩ, 1/4W metal film
- Q1, Q2: 2N3904 NPN Bipolar Junction Transistors
Wiring the Circuit:
Connect the emitters of Q1 and Q2 directly to ground (GND). Tie the collectors of Q1 and Q2 together; this common node is your Output. Connect one end of Rc to Vcc (5V) and the other end to the common collector node. Connect Input A to the base of Q1 through Rb1, and Input B to the base of Q2 through Rb2.
Logic Operation:
If both Input A and Input B are LOW (0V), both transistors are in cutoff. No current flows through Rc, and the Output is pulled HIGH (5V). If either Input A or Input B goes HIGH (5V), the corresponding transistor saturates, pulling the common collector node down to near ground (approx. 0.2V), resulting in a LOW output. This perfectly matches the truth table of a NOR gate.
BJT Operation Regions and Biasing for RTL
To use a BJT as a digital switch in resistance transistor logic, you must drive it strictly between two states: Cutoff (OFF) and Saturation (ON). The Active (linear) region is used for amplifiers, but in digital logic, lingering in the active region causes excessive power dissipation and undefined logic levels.
| Region | Base-Emitter Voltage (Vbe) | Collector-Emitter Voltage (Vce) | Collector Current (Ic) | Logic State |
|---|---|---|---|---|
| Cutoff | < 0.5V | ≈ Vcc (5.0V) | ≈ 0 mA (Leakage only) | OFF (Output HIGH) |
| Active (Linear) | ≈ 0.60V - 0.65V | 0.3V to Vcc | Ic = β × Ib | Invalid / Transitioning |
| Saturation | ≈ 0.70V - 0.80V | ≈ 0.1V - 0.2V (Vce_sat) | Ic < β × Ib (Limited by Rc) | ON (Output LOW) |
How to Bias and Select the Base Resistor
To guarantee saturation, you must supply enough base current (Ib) to overcome the transistor's current gain (β or hFE).
1. Calculate maximum collector current: Ic_max = (Vcc - Vce_sat) / Rc = (5V - 0.2V) / 1000Ω = 4.8mA.
2. Assume a conservative minimum β of 100 (from the ON Semiconductor 2N3904 Datasheet).
3. Minimum base current required: Ib_min = Ic_max / β = 4.8mA / 100 = 48µA.
4. Calculate base resistor: Rb = (V_in_high - Vbe) / Ib_min = (5V - 0.7V) / 48µA ≈ 89.5kΩ.
In practice, we apply an overdrive factor of 2 to 5 to ensure hard saturation across temperature variations and component tolerances. Dividing 89.5kΩ by an overdrive factor of 2 gives ~44.7kΩ. The nearest standard E24 resistor value is 47kΩ, which provides a robust, reliable saturation margin without wasting excessive current.
Safe Default Part Numbers and Component Selection
When prototyping or repairing discrete RTL circuits, stick to widely available, thoroughly characterized jellybean parts. Avoid high-speed RF transistors or Darlington pairs for standard RTL, as their capacitance and high Vce_sat will degrade logic margins.
| Part Number | Type | Max Vceo | Max Ic | Typical hFE | Best Use Case |
|---|---|---|---|---|---|
| 2N3904 | NPN | 40V | 200mA | 100 - 300 | Standard 5V/3.3V RTL logic gates |
| 2N3906 | PNP | -40V | -200mA | 100 - 300 | High-side switching, complementary RTL |
| 2N2222A | NPN | 40V | 800mA | 100 - 300 | RTL gates driving heavier loads (relays/LEDs) |
| BC547B | NPN | 45V | 100mA | 200 - 450 | Low-power, high-gain RTL (Note: C-B-E pinout) |
For resistors, standard 1/4W metal film resistors (1% tolerance) are ideal. Carbon composition resistors introduce unnecessary thermal noise and drift, which can shift your logic thresholds in multi-stage RTL chains.
Troubleshooting: How RTL Fails and Multimeter Testing
While discrete RTL is rugged, it is not immune to failure. The most common failure modes include thermal runaway (if the collector resistor is undersized, causing the die to overheat and increase leakage current), base-emitter junction breakdown (the Vbe reverse breakdown voltage of a 2N3904 is only about 6V; a negative input spike will destroy the junction), and solder bridges shorting the base to the emitter.
Step-by-Step Multimeter Testing
You can verify the health of an RTL transistor without removing it from the circuit (provided power is OFF and capacitors are discharged) using the diode test function on your digital multimeter (DMM).
- Set the DMM: Turn the dial to the diode test mode (indicated by a diode symbol).
- Test Base-Emitter (Forward): Place the red probe on the Base and the black probe on the Emitter. A healthy silicon NPN junction will read between 0.600V and 0.750V.
- Test Base-Collector (Forward): Place the red probe on the Base and the black probe on the Collector. Expect a similar reading of 0.600V to 0.750V.
- Test Reverse Bias: Swap the probes (black on Base, red on Emitter, then red on Collector). The meter should display OL (Over Limit / Open Loop). If it shows a voltage drop, the junction is shorted.
- Test Collector-Emitter: Place probes across Collector and Emitter in both directions. Both should read OL. A reading near 0.00V indicates a blown, shorted transistor.
If the Base-Emitter junction reads OL in both directions, the transistor is internally open—usually the result of an over-current event or a static discharge that blew the bond wire.
Resistance Transistor Logic FAQ
What is the main disadvantage of resistance transistor logic compared to CMOS?
The primary disadvantages of RTL are poor fan-out, high static power consumption, and slow switching speeds. In an RTL gate, the pull-up resistor (Rc) and the base resistors of the driven gates form a voltage divider. If you connect too many inputs to a single RTL output (high fan-out), the voltage divider effect pulls the HIGH logic level down below the valid threshold. Furthermore, when an RTL transistor is ON, current flows continuously from Vcc through Rc and the transistor to ground, wasting power. CMOS logic, by contrast, uses complementary MOSFETs that draw virtually zero static current and have near-infinite input impedance, allowing for massive fan-out. For a deeper comparison of logic family characteristics, refer to the Texas Instruments Logic Guide.
Can I use MOSFETs instead of BJTs in resistance transistor logic?
Technically, you can replace the BJTs with N-channel MOSFETs (like the 2N7000) and keep the input and pull-up resistors, but you are no longer building RTL; you are building discrete NMOS logic. While it works, the gate threshold voltage (Vgs_th) of a standard MOSFET is typically 2.0V to 3.0V, compared to the 0.7V Vbe of a BJT. This makes discrete NMOS gates much more sensitive to voltage drops across the pull-up resistor when driving multiple loads. Additionally, MOSFET gates have high capacitance, which, when combined with the high-value resistors used in discrete logic, creates a low-pass RC filter that severely limits your maximum switching frequency.
How do I calculate the fan-out for an RTL gate?
Fan-out is the number of standard inputs a single output can drive while maintaining valid logic levels. To calculate it, you must look at the LOW state. When the driving RTL gate outputs a LOW (transistor saturated), it must sink the base current from all connected gates.
If your driving transistor has a maximum safe sink current (Ic_max) of 20mA, and each driven gate requires 100µA of base current (calculated via (Vcc - Vbe) / Rb), the theoretical DC fan-out is 20mA / 100µA = 200. However, in reality, the Vce_sat of the driving transistor will rise as it sinks more current. You must check the datasheet's Vce_sat vs. Ic graph and ensure Vce_sat remains below the maximum LOW-level input voltage (Vil) of the driven gates (typically 0.8V). In practical 5V discrete RTL, a safe fan-out is usually limited to 5 to 10 gates.
Why did the Apollo Guidance Computer use RTL instead of TTL?
The Apollo Guidance Computer (AGC), designed in the early 1960s, utilized RTL integrated circuits (specifically custom Fairchild Semiconductor RTL chips) because TTL had not yet been invented or proven reliable. RTL was the only monolithic logic family available at the time that offered the necessary reliability and radiation tolerance for spaceflight. The AGC used thousands of 3-input RTL NOR gates. The high power consumption and low speed of RTL were acceptable trade-offs for the immense reduction in size, weight, and wiring complexity compared to the discrete vacuum tube or relay logic systems used in previous missile guidance systems.
