The relation between voltage and capacitance dictates how much electrical charge a component stores at a specific potential difference, but in practical circuit design, applied DC voltage can physically shrink a ceramic capacitor's effective capacitance. If you only read textbooks, you might think capacitance is a fixed geometric property. If you spend time at the bench debugging power rails, you know that the voltage you apply fundamentally changes the component's behavior.
In an ideal world, a capacitor's physical capacitance is determined solely by its plate area, distance between plates, and dielectric material. The voltage merely determines how much charge is pushed into that fixed volume. But when we move from abstract schematic symbols to physical surface-mount components, the dielectric material itself reacts to the electric field. Understanding this distinction is what separates a working prototype from a board that randomly resets under load.
The Core Physics: Charge, Voltage, and the Ideal Model
In textbook circuit theory, the relation between voltage and capacitance is defined by the equation Q = C × V, where Q is charge in Coulombs, C is capacitance in Farads, and V is voltage in Volts. In this ideal model, C is a constant. Changing the voltage does not change the capacitance; it only changes the amount of charge stored and the total energy held in the electric field.
The stored energy equation, E = ½CV², reveals what changing voltage actually does to a real circuit's energy reserves. Let's look at a concrete numeric example:
Imagine a 100µF bulk capacitor on a motor drive board.
- At 12V DC: Charge (Q) = 100µF × 12V = 1,200µC. Stored Energy = 0.5 × 0.0001F × (12)² = 7.2 mJ.
- At 24V DC: Charge (Q) = 100µF × 24V = 2,400µC. Stored Energy = 0.5 × 0.0001F × (24)² = 28.8 mJ.
Doubling the voltage doubles the stored charge, but it quadruples the stored energy. This is why a 24V system requires significantly more robust physical spacing and dielectric thickness to prevent arc-over and breakdown.
In a real installation, this relationship changes your power supply ripple, the timing constants in 555 oscillator circuits, and the physical size of the components you must select. What people commonly confuse, however, is assuming this ideal C = Q/V relationship holds true for all physical dielectrics under DC bias.
The Real-World Gotcha: DC Bias and Ceramic Capacitors
When you specify a Multi-Layer Ceramic Capacitor (MLCC) with a Class II dielectric (like X7R or X5R), the relation between voltage and capacitance becomes non-linear. These capacitors use barium titanate as a dielectric because it offers a massive dielectric constant, allowing for high capacitance in tiny 0402 or 0805 packages.
However, barium titanate is ferroelectric. When you apply a DC voltage across the plates, the internal electric field forces the microscopic dipoles in the dielectric to align. Once aligned, the material loses its ability to polarize further in response to AC signals. The result? A 10µF 0805 X7R capacitor rated for 16V might only deliver 2µF to 3µF of actual capacitance when 12V DC is applied.
This is known as the Voltage Coefficient of Capacitance (or DC bias effect). The physical geometry hasn't changed, but the effective capacitance has plummeted. According to Murata's technical guidelines on DC bias, this effect is entirely normal for Class II ceramics but is a frequent trap for engineers who only look at the nominal value printed on the schematic.
Where You Meet This in Practice
You will run into the non-linear relation between voltage and capacitance in several common bench and jobsite scenarios:
- Switch-Mode Power Supplies (Buck/Boost Converters): Output filter capacitors see a constant DC bias. If your effective capacitance drops by 60% due to DC bias, your output voltage ripple will spike, and the converter's control loop may become unstable, leading to high-frequency oscillation.
- Audio AC-Coupling Networks: If you use a ceramic capacitor to block DC between a preamp and a power amp, the DC offset voltage from the preamp will bias the capacitor. As the capacitance shrinks, your high-pass filter cutoff frequency shifts upward, rolling off bass frequencies and introducing severe low-frequency distortion.
- Motor Snubber Circuits: Capacitors placed across MOSFET drain-source terminals to suppress voltage spikes see the full bus voltage. A severely derated ceramic snubber will fail to absorb the inductive kickback, leading to blown switching transistors.
Bench Walkthrough: When a 10µF Cap Becomes a 2µF Cap
To see how this destroys a design, let's walk through a recent prototype failure involving an ESP32-S3 IoT node powered by a 5V buck converter.
The Setup: We needed a low-profile 5V rail to feed the ESP32-S3 and a cellular modem. To save space, we spec'd three 10µF 16V X5R 0805 MLCCs in parallel for the buck converter output, giving us a nominal 30µF total. We avoided bulky aluminum electrolytics to keep the board under 5mm thick.
The Numbers: The cellular modem draws transient current spikes of 400mA lasting about 5µs during transmission bursts. Using the transient voltage droop formula ΔV = (I × Δt) / C, we calculated the expected droop: ΔV = (0.4A × 5µs) / 30µF = 66mV. This was well within the 5V rail's tolerance.
The Outcome: The prototype worked perfectly on the bench with a static resistive load. But when we connected the modem and initiated a data transmission, the 5V rail violently drooped to 3.9V. The onboard 3.3V LDO dropped out of regulation, the ESP32-S3 hit a brownout threshold, and the board entered a continuous reset loop.
What Went Wrong: We ignored the DC bias effect. The 5V DC bias on those 16V X5R capacitors caused a 55% loss in effective capacitance. Our actual C was not 30µF; it was roughly 13.5µF. Recalculating the droop with the real capacitance: ΔV = (0.4A × 5µs) / 13.5µF = 148mV just from the capacitive discharge, before even accounting for the Equivalent Series Inductance (ESL) and ESR spikes of the ceramic packages. The total transient droop exceeded 1V, crashing the system.
Quick Reference: Dielectric Behavior Under Voltage
Not all capacitors suffer from DC bias. When evaluating the relation between voltage and capacitance for your bill of materials, use this matrix to select the right dielectric.
| Dielectric Type | DC Bias Effect | Typical Use Case | Voltage Limit Note |
|---|---|---|---|
| C0G / NP0 (Class I Ceramic) | None (0% loss) | RF filters, precision timing, audio coupling | Capacitance is perfectly stable; limited to lower µF values. |
| X7R / X5R (Class II Ceramic) | Severe (20% to 80% loss) | Power supply decoupling, bulk filtering | Always check the manufacturer's DC bias curve; derate voltage by 50%. |
| Aluminum Electrolytic | None (Capacitance stable) | High-energy bulk storage, low-frequency filtering | Voltage rating dictates oxide thickness; reverse voltage destroys them. |
| Tantalum / Polymer | Negligible | Compact bulk storage, low-ESR filtering | Strict voltage derating (usually 50%) required to prevent thermal runaway. |
For deeper component selection data, the All About Circuits textbook chapter on capacitors provides excellent foundational math on how these different dielectrics behave in DC and AC environments.
Frequently Asked Questions
Does voltage change the capacitance of an electrolytic capacitor?
No. The physical capacitance of an aluminum electrolytic capacitor remains stable regardless of the applied DC bias. However, the applied voltage determines the thickness of the internal aluminum oxide dielectric layer during manufacturing. Applying a voltage higher than the rated maximum will cause the dielectric to break down, leading to catastrophic venting or explosion.
Why do hardware engineers derate capacitor voltage by 50%?
For aluminum and tantalum capacitors, 50% voltage derating is a reliability measure to prevent dielectric breakdown and reduce leakage current over the component's lifespan. For MLCCs, derating the voltage (e.g., using a 50V cap on a 24V rail) is done specifically to avoid the DC bias capacitance drop, ensuring the component actually provides the microfarads you paid for.
Can I measure the DC bias effect with a standard multimeter?
No. A standard handheld multimeter measures capacitance using a very low AC test signal with zero DC bias. To measure effective capacitance under load, you need an LCR meter with a built-in DC bias source, or you must measure the AC ripple voltage on an oscilloscope while the circuit is powered and back-calculate the capacitance using the known ripple current.
