A multiplexer schematic is a circuit diagram showing how a digital switch routes one of several input signals to a single output line using binary select pins. By acting as a digitally controlled rotary switch, it changes a real circuit by drastically reducing the number of physical wires and microcontroller GPIO pins required to read multiple sensors or route data. Think of it like a railroad switchyard where multiple incoming tracks merge onto a single mainline, and the select pins are the levers determining which track is currently aligned.
The Core Architecture Inside a Multiplexer Schematic
When you look at a multiplexer schematic at the logic-gate level, you are looking at an array of AND gates feeding into a single OR gate. For an 8-to-1 multiplexer (like the classic 74HC151), there are eight data inputs (D0–D7), three select lines (S0, S1, S2), and one output (Y). Each AND gate receives one data input and a unique combination of the select lines (and their inverted states via NOT gates). Only the AND gate whose select-line combination matches the binary input will output a HIGH, passing its specific data bit to the final OR gate.
Most multiplexer schematics include an Enable (E) or Strobe pin, often active-LOW. If you ignore this pin and leave it floating, CMOS logic will draw massive internal shoot-through current. Always tie unused Enable pins to their inactive state (usually VCC for active-LOW pins) via a 10kΩ resistor.
| Select S2 | Select S1 | Select S0 | Routed Input to Output Y |
|---|---|---|---|
| 0 | 0 | 0 | D0 |
| 0 | 1 | 1 | D3 |
| 1 | 0 | 1 | D5 |
| 1 | 1 | 1 | D7 |
Worked Numeric Example: Sizing a 16-Channel Sensor Array
Let’s look at what a multiplexer changes in a real installation. Suppose you need to read 16 NTC thermistors for a battery pack thermal management system. Without a multiplexer, you need 16 analog-to-digital converter (ADC) pins. With a 16-channel analog multiplexer like the CD74HC4067, you only need 4 digital select pins and 1 analog input pin—saving 11 microcontroller pins.
However, analog multiplexers introduce On-Resistance (R_ON). According to the TI datasheet, the CD74HC4067 has a typical R_ON of 120Ω at 5V. Let’s calculate the measurement error this introduces.
- Baseline Resistance: Your NTC thermistor reads exactly 10,000Ω (10kΩ) at 25°C.
- MUX Added Resistance: The multiplexer adds 120Ω in series. Total resistance seen by the ADC = 10,120Ω.
- Error Calculation: (120Ω / 10,000Ω) * 100 = 1.2% resistance error.
- ADC Impact: On a 12-bit ADC (4096 steps), a 1.2% error equates to roughly 49 steps of deviation. Depending on the thermistor's Beta value, this could translate to a 0.5°C temperature reading error.
If your application requires high precision, you must either calibrate out the 120Ω offset in software or use a more expensive multiplexer with lower R_ON, such as the ADG706 (which boasts roughly 2.5Ω R_ON but costs significantly more).
Where You Meet This in Practice
You will frequently encounter multiplexer schematics in the following real-world builds:
- I2C Bus Routing: The TCA9548A is an I2C multiplexer used to route a single microcontroller I2C bus to eight separate sub-buses, solving address conflicts when using multiple identical sensors (like four BME280s).
- LED Matrices: Charlieplexing and standard LED matrices use multiplexing to light up hundreds of LEDs using only a handful of shift registers and GPIO pins by rapidly switching the active row/column.
- Audio Routing: Analog multiplexers like the 4052 are used in guitar pedals and synthesizers to switch audio signals between different effect chains without mechanical relays.
Real-World Scenario Walkthrough: The Floating Input Disaster
Setup: A hobbyist is building a CNC router and needs to read 8 limit switches. They wire a 74HC151 (8-to-1 digital MUX) on a 5V rail to read the switches, feeding the single output to an ESP32 GPIO pin configured as an input.
Numbers: The 74HC151 is powered at 5.0V. The ESP32 operates at 3.3V logic, with an absolute maximum GPIO voltage rating of 3.6V. The limit switches are located up to 2 meters away, connected via unshielded ribbon cable.
Outcome: When the spindle motor’s Variable Frequency Drive (VFD) kicks on, the ESP32 registers phantom limit-switch triggers, halting the CNC job. Worse, the ESP32 occasionally brownouts and resets, and the 74HC151 chip feels hot to the touch.
What Went Wrong:
- Voltage Overstress: When the MUX outputs a HIGH (5V), it exceeds the ESP32’s 3.6V absolute maximum. This forward-biases the ESP32’s internal ESD protection diodes, injecting current into the 3.3V rail and causing the brownout.
- EMI Susceptibility: The 2-meter unshielded wires acted as antennas, picking up high-frequency noise from the VFD. Because the MUX was powered at 5V, its logic HIGH threshold was higher, but the noise spikes were still crossing the threshold and passing straight to the ESP32.
- Floating Inputs: The builder only wired 5 limit switches, leaving inputs D5, D6, and D7 floating. In CMOS logic, floating inputs oscillate wildly, causing internal shoot-through current that heats up the chip and injects noise into the shared ground plane.
The Fix: The builder tied all unused MUX inputs directly to GND. They moved the 74HC151 VCC pin from the 5V rail to the 3.3V rail (the HC series natively supports 2V to 6V operation), which solved the ESP32 overvoltage issue and lowered the logic thresholds. Finally, they added 100nF decoupling capacitors at the MUX power pins and a 10kΩ pull-down resistor on the output line to filter VFD noise.
What People Commonly Confuse It With
When reading logic schematics, it is easy to mix up three similar-looking blocks:
- Multiplexer (MUX): Many inputs, one output. Routes data based on select lines. (e.g., 74HC151).
- Demultiplexer (DEMUX): One input, many outputs. Takes a single data stream and routes it to one of many destinations based on select lines. (e.g., 74HC138 used as a DEMUX).
- Decoder: Binary inputs, multiple outputs. Converts a binary number into a "one-hot" output (only one output pin goes HIGH at a time). It does not route data; it translates addresses. (e.g., 74HC154).
FAQ: Multiplexer Schematic Design
Q: Can I cascade multiplexers in a schematic to get more channels?
A: Yes. You can cascade two 8-to-1 multiplexers into a single 16-to-1 multiplexer by feeding their outputs into a third 2-to-1 multiplexer, or by using their Enable pins as a fourth select line. Be aware that cascading adds propagation delay (typically 10-20ns per stage for 74HC logic) and stacks the R_ON if using analog multiplexers.
Q: Does a multiplexer schematic show analog or digital signals?
A: It depends on the silicon. Schematics using 74-series logic (like 74HC151) are strictly for digital signals. Schematics using 4000-series CMOS (like CD4051) or dedicated analog switches (like DG408) can route analog voltages, provided the signal stays within the power supply rails of the chip.
Q: Why do some multiplexer schematics show transmission gates instead of AND/OR gates?
A: At the transistor level, modern CMOS multiplexers are built using transmission gates (a parallel NMOS and PMOS pair) rather than discrete AND/OR gates. Transmission gates pass both strong HIGH and strong LOW analog voltages with minimal voltage drop, which is why they are used in analog MUX ICs.






