If you need to read a 0–100mV shunt voltage or a low-output thermocouple with a 3.3V microcontroller ADC, you cannot wire the sensor directly to the GPIO pin. You need gain, and you need it without loading down the source. The non-inverting op amps circuit is the definitive solution for this exact problem. Unlike the inverting topology, which forces your signal through an input resistor and lowers the input impedance, the non-inverting configuration presents an ultra-high impedance to the source while providing precise, predictable voltage gain.
This guide walks through the physical topology, component selection for 3.3V systems, a complete design calculation for an ESP32 ADC interface, and a step-by-step breadboard validation sequence.
Topology Map and the Input Impedance Advantage
The classic non-inverting amplifier relies on negative feedback to force the voltage at the inverting input to match the non-inverting input. Here is the physical node map for the standard configuration:
- $V_{in}$ (Source Node): Connects directly to the non-inverting input ($V_+$). No series resistor is required.
- $V_+$ (Non-Inverting Input): The high-impedance sensing node. In an ideal op-amp, input bias current is zero, meaning no voltage drop occurs across the source's internal resistance.
- $V_-$ (Inverting Input): The summing node. Connected to the junction of the feedback network.
- $R_f$ (Feedback Resistor): Connects from the output ($V_{out}$) back to $V_-$.
- $R_g$ (Ground Resistor): Connects from $V_-$ to circuit ground (GND).
- $V_{out}$ (Output Node): Drives the load (e.g., microcontroller ADC) and feeds $R_f$.
The inverting amplifier's input impedance is strictly equal to its input resistor ($R_{in}$). If you need a gain of 33 and use a 10k feedback resistor, your input resistor must be ~300Ω. A 300Ω input impedance will heavily load a high-impedance sensor like a piezo element or a voltage divider, causing severe signal attenuation before the op-amp even sees it. The non-inverting topology's input impedance is typically >100MΩ (and >1TΩ for CMOS inputs), effectively isolating the sensor from the amplifier's gain network.
Component Selection and Failure Mode Matrix
Before calculating resistor values, you must select the right silicon. For a 3.3V microcontroller system, you need a rail-to-rail input/output (RRIO) op-amp that operates on a single 3.3V supply. Below is a data-dense comparison of common through-hole and SOIC options suitable for this exact application.
| Part Number | Supply Range | Input Bias Current ($I_b$) | GBW (MHz) | Vos (Max) | Best Use Case |
|---|---|---|---|---|---|
| LMV321 (TI) | 2.7V – 5.5V | 20 nA | 1.0 | 7 mV | General purpose, low cost ($0.35) |
| MCP6001 (Microchip) | 1.8V – 6.0V | 1 pA | 1.0 | 4.5 mV | High-impedance sensors ($0.40) |
| OPA333 (TI) | 1.8V – 5.5V | 20 pA | 0.35 | 10 µV | Precision DC, thermocouples ($2.10) |
| TLV9001 (TI) | 1.8V – 5.5V | 5 pA | 1.0 | 1.2 mV | Fast settling, low offset ($0.65) |
Note: Always verify the Gain Bandwidth Product (GBW). If your signal is 10kHz and your gain is 33V/V, you need an op-amp with at least 330kHz GBW. The OPA333 (350kHz) will struggle and introduce phase shift at 10kHz; choose the TLV9001 instead for AC signals.
Behavior and Extreme Failure Modes
When debugging, you need to know what the circuit does when a component fails or is miswired. Here is the behavior matrix for the non-inverting topology:
| Element State | Circuit Behavior | Output Result ($V_{out}$) |
|---|---|---|
| $R_f$ Opens | Feedback loop breaks. Op-amp acts as an open-loop comparator. | Saturates to positive rail (~3.28V on a 3.3V supply). |
| $R_g$ Shorts | Gain equation becomes $1 + (R_f / 0)$. Infinite theoretical gain. | Saturates to positive rail instantly. |
| $R_g$ Opens | $V_-$ is only connected to $V_{out}$ via $R_f$. 100% negative feedback. | Acts as a unity-gain buffer ($V_{out} = V_{in}$). |
| $V_+$ Floats | Input bias current charges parasitic capacitance at the pin. | Drifts slowly to either rail; highly susceptible to 50/60Hz hum. |
| $V_{in}$ exceeds $V_{CC}$ | Internal ESD diodes forward-bias, pulling current from the source. | Clamped to $V_{CC} + 0.3V$; risks permanent silicon damage. |
Design Walkthrough: 0–100mV to 3.3V ESP32 ADC Buffer
Let's design a real-world circuit. We have a current shunt that outputs 0–100mV, and we want to map this to the ESP32's 0–3.3V ADC range. We will use the TLV9001 for its excellent balance of low offset (1.2mV max) and 1MHz GBW.
1. Calculating the Gain Network
The ideal gain required is $3.3V / 0.1V = 33V/V$.
The non-inverting gain equation is:
$G = 1 + \frac{R_f}{R_g}$
We need the ratio $R_f / R_g$ to equal 32. To minimize thermal noise and avoid excessive current draw, we target the 10kΩ to 100kΩ range for our resistors. Let's set $R_g = 10.0k\Omega$ (standard 1% value).
Therefore, $R_f = 32 \times 10.0k\Omega = 320k\Omega$.
Since 320kΩ is not a standard 1% E96 value, we select the closest standard resistor: $R_f = 324k\Omega$.
Actual Gain Check: $G = 1 + (324 / 10) = 33.4V/V$.
At 100mV input, $V_{out} = 3.34V$. This is perfect; it leaves a tiny 40mV headroom below the 3.3V rail, ensuring the op-amp doesn't clip due to output swing limitations (the TLV9001 can swing to within ~10mV of the rail, but headroom is always wise).
2. Adding the Low-Pass Filter
Microcontroller ADCs use a successive approximation register (SAR) that switches an internal sampling capacitor. This creates high-frequency charge injection kickback that can destabilize the op-amp. We must add a feedback capacitor ($C_f$) in parallel with $R_f$ to create a low-pass filter and isolate the capacitive load.
Target cutoff frequency ($f_c$) = 10kHz (assuming our shunt signal is DC to 5kHz).
$f_c = \frac{1}{2 \pi R_f C_f}$
$C_f = \frac{1}{2 \pi \times 324,000 \times 10,000} \approx 49pF$.
We will use a standard 47pF C0G/NP0 ceramic capacitor. (Always use C0G for signal-path capacitors; X7R dielectrics exhibit microphonics and voltage coefficients that distort precision DC measurements).
3. Input Bias Current Compensation
The TLV9001 has an input bias current of ~5pA. Flowing through a 10kΩ source impedance, this creates an offset of only 50nV—completely negligible. If you were using a bipolar op-amp like the LM358 ($I_b$ = 20nA), you would need to add a matching 10kΩ resistor in series with $V_+$ to balance the voltage drops. With CMOS op-amps, this matching resistor is unnecessary and only adds thermal noise.
Breadboard Testing and Debugging Sequence
Do not just wire it up and apply power. Follow this exact sequence to prevent latching up the IC or chasing ghost oscillations. For this test, use an 8-pin DIP version of your chosen op-amp (e.g., TLV9001P or LMV321-N).
- Place and Bridge: Straddle the op-amp across the breadboard center trench. Pin 1 is top-left (marked by a dimple). Use solid 22 AWG jumper wire to bridge Pin 4 (GND) to the negative rail, and Pin 8 (VCC) to the positive 3.3V rail.
- Decouple Locally: Insert a 100nF X7R MLCC capacitor directly across Pins 4 and 8. The physical leads should touch the IC pins or the immediately adjacent holes. This provides the high-frequency charge the op-amp needs during fast output slewing. Without this, the circuit will likely oscillate at >1MHz, showing up as a mysterious DC offset on your multimeter.
- Wire the Feedback Network: Connect $R_g$ (10.0kΩ) from Pin 2 ($V_-$) to GND. Connect $R_f$ (324kΩ) from Pin 2 to Pin 6 ($V_{out}$). Solder or press the 47pF $C_f$ directly in parallel with $R_f$.
- Establish the Input: Use a potentiometer wired as a voltage divider across the 3.3V rail to generate a test $V_{in}$. Wire the wiper to Pin 3 ($V_+$). Never leave Pin 3 floating during power-up.
- Power and Verify DC: Apply 3.3V. Set your multimeter to DC voltage. Measure Pin 3 ($V_+$) and Pin 6 ($V_{out}$). If $V_+$ is 50mV, $V_{out}$ should read $1.67V \pm 5mV$. If $V_{out}$ is pinned at 3.28V, your feedback loop is open (check $R_f$). If $V_{out}$ is 0V, check $R_g$ for a short to ground.
- Check for AC Oscillation: If your DC reading is slightly high (e.g., 1.80V instead of 1.67V) and drifts when you wave your hand over the board, the op-amp is oscillating. Connect an oscilloscope to Pin 6. If you see a high-frequency sine wave, increase $C_f$ to 100pF or ensure your decoupling capacitor is physically closer to the IC pins.
By respecting the input impedance advantages, selecting the correct GBW and offset specifications, and physically decoupling the power pins on the breadboard, your non-inverting op amps circuit will deliver clean, rail-to-rail data straight into your microcontroller's ADC.
Sources and Further Reading:
Texas Instruments: Operational Amplifiers Overview and Selection
SparkFun Electronics: Op-Amp Fundamentals and Topologies
Analog Devices: Ask The Applications Engineer — Op Amp Input and Output Constraints
