A precision current flow circuit regulates electron flow through a load regardless of impedance variations, up to the compliance voltage limit. While a simple series resistor can limit current, it fails the moment the load's forward voltage or supply rail shifts. For bench testing, LED driving, and battery charging, the industry standard is the Op-Amp driven MOSFET constant current sink. The governing law is strictly Ohmic at the feedback node: the circuit forces the voltage across a sense resistor to equal a reference voltage, yielding a target current of I_load = V_ref / R_sense.

This guide details the exact topology, component selection, and failure modes for building a 500mA precision current sink, moving beyond abstract theory into bench-ready implementation.

Topology Architecture and Node Definitions

The circuit relies on negative feedback. The operational amplifier continuously adjusts the MOSFET's gate voltage to force the voltage at its inverting input to match the non-inverting input. Below is the node map for the standard low-side current sink configuration.

  • Node A (V_SUPPLY): Positive power rail feeding the load (e.g., 12V or 24V DC).
  • Node B (LOAD_HI): Connection to the load's anode/positive terminal.
  • Node C (DRAIN): MOSFET drain, connected to the load's cathode/negative terminal.
  • Node D (SOURCE / SENSE_HI): MOSFET source, tied to the top of the sense resistor and the op-amp's inverting input (Node G).
  • Node E (GND / SENSE_LO): Bottom of the sense resistor, tied to circuit ground.
  • Node F (V_REF): Op-amp non-inverting input, fed by a stable DC reference voltage.
  • Node G (V_FB): Op-amp inverting input (feedback node).
  • Node H (V_GATE): Op-amp output, driving the MOSFET gate through a small series resistor.

Component Spec Sheet: 500mA Sink Baseline

Designator Component / Value Critical Specification
U1 LM358 (Dual Op-Amp) Single-supply capable, input common-mode includes ground, V_OS ≈ 2mV.
Q1 IRLZ44N (N-Channel MOSFET) Logic-level V_GS(th) (1-2V), robust linear mode Safe Operating Area (SOA).
R_SENSE 2.40Ω, 1%, 2W Metal Film Low temperature coefficient (≤50ppm/°C) to prevent thermal drift.
R_GATE 100Ω, 1/4W Carbon Film Isolates op-amp output from MOSFET gate capacitance to prevent high-frequency oscillation.
R_PD 10kΩ, 1/4W Carbon Film Gate-to-ground pulldown; ensures Q1 remains off if U1 loses power or during MCU boot.

Dynamic Behavior Matrix

Understanding how the current flow circuit reacts to parameter shifts is critical for debugging. The table below maps the physical response when a single variable is altered while the others remain static.

Parameter Changed Effect on Load Current Effect on MOSFET (Q1)
Increase V_REF Increases proportionally (I = V_REF / R_SENSE) V_GS increases; power dissipation increases.
Increase R_SENSE Decreases inversely V_GS decreases; power dissipation drops.
Increase Load Resistance Remains constant (until compliance limit) V_DS increases; MOSFET absorbs the extra voltage drop.
Increase V_SUPPLY Remains constant V_DS increases; MOSFET power dissipation spikes.

Why an Op-Amp MOSFET Sink Over Alternatives?

You might wonder why we use this specific topology instead of simpler alternatives. The choice comes down to compliance voltage and thermal stability.

Alternative 1: The Series Resistor. A simple resistor limits current based on the total voltage drop. If you are driving an LED string with a 12V supply, and the LED forward voltage shifts from 3.0V to 3.3V as it heats up, the current drops noticeably. A resistor cannot dynamically adjust its resistance to compensate for load variations.

Alternative 2: The BJT Current Mirror. While a bipolar junction transistor mirror provides constant current, it suffers from the Early effect (current varies slightly with collector-emitter voltage) and is highly susceptible to thermal runaway. As the BJT heats up, its V_BE drops, causing the current to increase, which generates more heat—a destructive positive feedback loop.

The Op-Amp and MOSFET combination solves both issues. The op-amp's high open-loop gain forces the feedback node to match the reference with millivolt precision, while the MOSFET's negative temperature coefficient at high currents inherently resists thermal runaway in linear operation, provided it is kept within its Safe Operating Area (SOA). For a deeper look at linear MOSFET operation limits, refer to Analog Devices' Basic Linear Design Handbook.

Design Walkthrough: Sizing for a 500mA Load

Let’s calculate the exact values to drive a 500mA load using a 12V supply.

  1. Set the Reference Voltage (V_REF): We need a stable voltage. Using an LM358 op-amp on a 5V single supply, let's set V_REF to 1.20V using a precision shunt reference (like an LM4040-1.2) or a filtered microcontroller DAC output.
  2. Calculate R_SENSE: Using Ohm's law, R = V / I. R_SENSE = 1.20V / 0.500A = 2.40Ω. Select a 1% tolerance metal film resistor. Standard E96 series includes 2.40Ω.
  3. Size the Sense Resistor Wattage: Power dissipated by the resistor is P = I² × R. 0.5² × 2.4 = 0.6W. To prevent the resistor from drifting due to self-heating, use a 2W rated component. Running a 2W resistor at 0.6W keeps it barely warm to the touch.
  4. Verify Op-Amp Headroom: The LM358 output can swing to within ~1.5V of its positive rail. If powered by 5V, max V_GATE is ~3.5V. The IRLZ44N has a V_GS(th) of 1.0V to 2.0V. At V_GS = 3.5V, it can easily pass 500mA in the linear region without saturating the op-amp.
  5. Calculate Compliance Voltage: The maximum voltage the load can drop before the circuit starves. V_compliance = V_SUPPLY - V_SENSE - V_DS(sat). Assuming a 12V supply, 1.2V sense drop, and ~0.5V minimum V_DS for the FET, the load can drop up to 10.3V. If your load requires 11V, this circuit will fail to regulate; you must increase V_SUPPLY.

Breadboard Testing and Verification Protocol

Do not connect your expensive load until you have verified the open-loop and closed-loop behavior on the breadboard. Follow this exact sequence:

Safety Callout: Even at 12V-24V, a shorted MOSFET can cause wires to glow red hot and melt breadboard plastic. Always use a bench power supply with a hardware current limit set slightly above your target (e.g., 600mA for a 500mA circuit) during initial testing.
  1. Wire the Control Plane: Insert the LM358. Connect Pin 8 to 5V and Pin 4 to GND. Place a 100nF ceramic bypass capacitor directly across Pins 8 and 4 to prevent high-frequency rail bounce.
  2. Wire the Feedback Network: Connect R_SENSE (2.40Ω) between Node D and GND. Wire Node D to the inverting input (Pin 2). Wire your 1.20V reference to the non-inverting input (Pin 3).
  3. Wire the Gate Drive: Connect Pin 1 (Op-Amp output) to the MOSFET gate through the 100Ω R_GATE. Install the 10kΩ R_PD between the gate and GND.
  4. Pre-Flight Voltage Check: With the MOSFET drain (Node C) left disconnected, power the op-amp and apply V_REF. Measure the voltage at the op-amp output (Node H). It should immediately rail high (approx 3.5V) because the op-amp sees 0V at the inverting input and is trying desperately to pull current through an open circuit. This confirms the op-amp is alive and functioning.
  5. Connect a Dummy Load: Power down. Connect a high-wattage power resistor (e.g., 10Ω, 10W) between V_SUPPLY (12V) and the MOSFET drain.
  6. Measure and Verify: Power up. Place your digital multimeter in DC voltage mode and probe across R_SENSE. You should read exactly 1.20V (±10mV). Switch the DMM to current mode, break the circuit, and insert the meter in series with the load to verify the 500mA flow.

Extreme Failure Modes: Open and Short Conditions

A robust current flow circuit design requires understanding what breaks at the extremes. The behavior of the MOSFET changes drastically depending on the load fault.

The Open Load Extreme: If the load wire breaks, Node C is floating. No current can flow, so the voltage across R_SENSE drops to 0V. The op-amp detects that V_FB (0V) is less than V_REF (1.2V) and drives its output as high as possible. Node H hits ~3.5V. The MOSFET turns on hard, but since there is no physical path for electrons, I_load remains 0A. The circuit is safe, though the op-amp is saturated. When the load reconnects, the op-amp will rapidly pull the gate voltage back down to the regulating point.

The Shorted Load Extreme: This is the lethal scenario. If the load is bypassed and Node C is tied directly to the 12V V_SUPPLY, the circuit will still attempt to regulate 500mA. However, the entire 12V supply minus the 1.2V sense drop (10.8V) now appears across the MOSFET's drain and source (V_DS). Power dissipation in the MOSFET becomes P = V_DS × I = 10.8V × 0.5A = 5.4W.

While 5.4W sounds manageable, a TO-220 package without a heatsink has a junction-to-ambient thermal resistance of roughly 62°C/W. A 5.4W dissipation yields a 334°C temperature rise, instantly exceeding the 175°C silicon limit and destroying the MOSFET. Furthermore, standard switching MOSFETs suffer from the Spirito effect in linear mode, where localized hotspots form and cause thermal runaway at voltages far below their rated V_DS. Always ensure your MOSFET is rated for linear operation and add a physical heatsink if short-circuit conditions are possible in your application.