The Practical Integrator: Beyond the Ideal Math
If you build a textbook "ideal" integrator using op amp topology, it will almost certainly fail on the bench. An ideal integrator has infinite DC gain, meaning any microscopic input offset voltage or input bias current will continuously charge the feedback capacitor until the output slams into the supply rail and saturates. To build a working circuit, you must design a practical integrator that bleeds off DC error while faithfully integrating your target AC or pulse signals.
Pinout, Symbol, and Core Circuit Anatomy
The standard op-amp integrator symbol features the classic triangle with an inverting input (-), a non-inverting input (+), and an output. The defining characteristic is the capacitor ($C_f$) in the feedback loop connecting the output to the inverting input, and a resistor ($R_{in}$) connecting the input signal to the inverting input. The non-inverting input is tied to your reference ground (or virtual ground).
Standard 8-Pin DIP Pinout (Dual Op-Amp)
Most hobbyist and prototyping integrators use a dual op-amp in an 8-pin DIP package. Here is the standard pin mapping looking down at the chip with the notch at the top:
- Pin 1: Output A
- Pin 2: Inverting Input A (-)
- Pin 3: Non-Inverting Input A (+)
- Pin 4: V- (Negative Supply / GND for single supply)
- Pin 5: Non-Inverting Input B (+)
- Pin 6: Inverting Input B (-)
- Pin 7: Output B
- Pin 8: V+ (Positive Supply)
The Complete Practical Application Circuit
Here is a battle-tested component list for a 1kHz square-wave-to-triangle-wave integrator. This circuit includes the critical DC-stabilizing feedback resistor.
| Component | Designator | Value / Rating | Purpose |
|---|---|---|---|
| Input Resistor | $R_{in}$ | 10 kΩ (1% metal film) | Sets input impedance and integration time constant. |
| Feedback Capacitor | $C_f$ | 100 nF (C0G/NP0 ceramic or polypropylene) | Integrates the current. Must be low-leakage (avoid X7R/Y5V). |
| Feedback Resistor | $R_f$ | 1 MΩ (1% metal film) | Critical: Limits DC gain to -100, preventing low-frequency saturation. |
| Compensation Resistor | $R_{comp}$ | 10 kΩ | Placed on non-inverting pin to ground to minimize bias current offset. |
The Math: The integration time constant is $\tau = R_{in} \times C_f = 10\text{k} \times 100\text{nF} = 1\text{ms}$. The DC corner frequency where it stops integrating and acts as a standard inverting amplifier is $f_c = 1 / (2\pi \times R_f \times C_f) \approx 1.59\text{Hz}$. Signals above ~16 Hz are cleanly integrated; DC drift is safely shunted through $R_f$. For deeper theory on stabilizing these loops, refer to the Texas Instruments Integrator Topology Guide.
Operation Regions and Biasing for Real-World Signals
Op-amps do not operate at the exact supply rails. Understanding the headroom requirements is critical so your integrated waveform doesn't clip prematurely.
| Parameter | Dual Supply ($\pm$15V) | Single Supply (+5V) | Notes |
|---|---|---|---|
| Input Common-Mode Range | $\pm$11V typical | +0.5V to +4.5V | Keep signals away from the rails to avoid phase reversal. |
| Output Voltage Swing | $\pm$13.5V (into 10kΩ) | +0.1V to +4.8V | Standard op-amps lose ~1.5V at the rails. Use 'Rail-to-Rail' for single supply. |
| Quiescent Current ($I_q$) | ~1.4 mA per channel | ~0.1 mA per channel | Draw from V+ pin; factor this into battery-powered designs. |
| Virtual Ground Bias | 0V (System Ground) | +2.5V (VCC/2 divider) | Single supply requires an artificial mid-rail reference for AC signals. |
Decision Tree: Selecting the Right Op-Amp
Do not just grab the first chip in your bin. The input stage topology (BJT vs. JFET vs. CMOS) dictates how your integrator behaves over time. Use this decision matrix to lock in your part number.
| If Your Application Requires... | Then Choose This Topology | Concrete Part Number (Dual) | Typical 2026 Price |
|---|---|---|---|
| Audio integration, low noise, general analog computing | JFET Input (Low bias current, low voltage noise) | TL072 (TI) or OPA2134 | $0.80 - $4.50 |
| Precision DC integration, sensor conditioning, long time constants | Bipolar Precision (Ultra-low offset voltage, auto-zero) | OPA2277 (TI) or ADA4522-2 (ADI) | $4.50 - $8.00 |
| 5V/3.3V single-supply microcontroller interfacing | CMOS Rail-to-Rail (Wide common mode, low voltage) | MCP6002 (Microchip) or TLV9002 (TI) | $0.40 - $1.20 |
| High-speed pulse integration, video signals (>1MHz) | Current Feedback or High-Speed Voltage Feedback | THS4032 (TI) | $6.00+ |
The Verdict: If you are unsure, buy the TL072. Its JFET inputs have picoamp-level bias currents, meaning it won't silently charge your 100nF capacitor and ruin your DC operating point like a standard LM741 or LM358 would. For a comprehensive breakdown of input stage trade-offs, the All About Circuits Integrator Chapter provides excellent baseline theory.
Failure Modes, Saturation, and Multimeter Testing
Integrators fail in very specific, predictable ways. When a circuit "doesn't work," it is almost always pegged to a rail. Here is how to diagnose it on the bench using a standard digital multimeter (DMM).
Symptom: Output is pegged at +13.5V or -13.5V (on a $\pm$15V supply)
Cause 1: Missing $R_f$ (DC Saturation). If you built an ideal integrator without the 1MΩ parallel resistor, the input offset voltage is integrating to infinity.
Fix: Solder a 1MΩ to 10MΩ resistor directly across the feedback capacitor legs.
Cause 2: Leaky Capacitor. If $C_f$ is a cheap electrolytic or a damaged ceramic, DC current leaks through it, destroying the virtual ground and forcing the op-amp to rail to compensate.
Fix: Replace $C_f$ with a high-quality C0G/NP0 ceramic or polypropylene film capacitor. Never use Y5V or X7R dielectrics for precision integration due to severe voltage coefficient and microphonic effects.
Cause 3: Input Bias Current Accumulation. If you used a BJT-input op-amp (like the LM358) with a massive 1MΩ $R_{in}$, the base current required by the input transistors creates a massive voltage drop across $R_{in}$, shifting the DC point.
Fix: Lower $R_{in}$ to 10kΩ or switch to a JFET/CMOS op-amp.
How to Test with a Multimeter (The Virtual Ground Check)
- Power Check: Set DMM to DC Volts. Measure Pin 8 to Pin 4. Verify you have your expected supply (e.g., 30V for $\pm$15V, or 5V for single supply).
- Reference Check: Measure Pin 3 (Non-inverting). It should read exactly 0V (dual supply) or exactly VCC/2 (single supply).
- Virtual Short Check: Measure Pin 2 (Inverting). It must read within 2-5 mV of Pin 3. If Pin 3 is at 0V and Pin 2 is at 0.002V, the op-amp is healthy and the feedback loop is closed.
- Output Check: Measure Pin 1 (or 7). With no AC input signal, the DC voltage here should match Pin 3 (0V or VCC/2). If it reads +14V or -14V, your feedback loop is open (check solder joints on $C_f$ and $R_f$) or the chip is saturated/destroyed.
Safe Default Part Numbers and Final Ratings
To eliminate decision fatigue and ensure your first breadboard iteration works, here are the exact default specifications to order:
- The Workhorse: Texas Instruments TL072CP (8-pin PDIP). Rated for $\pm$18V max supply, 3mV max offset voltage, 200pA max input bias current. Perfect for audio and function generators.
- The Precision Upgrade: Texas Instruments OPA2277UA (8-pin SOIC). Rated for $\pm$18V max supply, 20μV max offset voltage, 1nA max bias current. Use this when integrating slow-moving thermocouple or strain gauge signals.
- The 5V Microcontroller Companion: Microchip MCP6002-I/P (8-pin PDIP). Rated for 1.8V to 6.0V single supply, Rail-to-Rail I/O. Use this when reading PWM from an Arduino or ESP32 and integrating it into a smooth analog DC control voltage.
By pairing one of these op-amps with the 10kΩ / 100nF / 1MΩ practical topology detailed above, you will achieve a stable, drift-free integrator that behaves exactly as the math predicts—without the frustrating saturation issues that plague textbook designs.
