When designing a linear power stage, the default protection strategy for a 24V-to-12V pass transistor delivering 1.5A continuous current is a TIP122 Darlington pair mounted on an Aavid 513302B02500G extruded heatsink, protected on the supply rail by a Bourns MF-R300 positive temperature coefficient resistor. This specific polymeric PTC (resettable fuse) holds 3A at room temperature but its resistance spikes exponentially at higher temperatures, acting as a self-resetting thermal breaker if your heatsink fails or ambient enclosure temperatures rise.

A positive temperature coefficient resistor is not just a sensor; in power electronics, a polymeric PTC is an active protection device. Its resistance remains low (under 0.1 ohms) until it hits its trip temperature or experiences an overcurrent event that self-heats it past the threshold. Here is the exact bench math and component selection process to integrate one into your next thermal management design.

The Thermal Path: Junction-to-Ambient Math

Before you can pick a positive temperature coefficient resistor, you must quantify the thermal failure point of the component it is protecting. We will use a 24V input, 12V output linear pass stage delivering 1.5A to a DC load.

Bench Rule: Never design to the absolute maximum junction temperature (TJ). If the datasheet says 150°C, design for 125°C. Silicon degrades rapidly and solder joints suffer thermal fatigue above 125°C.

First, calculate the power dissipation (PD):
PD = (Vin - Vout) × I = (24V - 12V) × 1.5A = 18W.

Next, we map the thermal resistance network from the silicon junction to the ambient air. The total thermal resistance (RθJA) is the sum of its parts:

Thermal NodeSymbolValue (°C/W)Source / Notes
Junction to CaseJC1.92TIP122 Datasheet (TO-220 package)
Case to SinkCS0.50Standard 0.5mm silicone thermal pad
Sink to AmbientSAVariableDetermined by heatsink selection

We need to find the maximum allowable RθJA to keep the junction at or below our 125°C target, assuming a worst-case enclosure ambient (TA) of 40°C.

JA(req) = (TJ - TA) / PD
JA(req) = (125°C - 40°C) / 18W = 4.72°C/W

Now, solve for the required heatsink performance (RθSA):
SA = RθJA(req) - RθJC - RθCS
SA = 4.72 - 1.92 - 0.50 = 2.30°C/W

Any heatsink with a thermal resistance of 2.30°C/W or lower in natural convection will keep this circuit alive. For a deeper look on minimizing the case-to-sink interface, refer to the Texas Instruments guide on thermal pad interfaces.

Heatsink Selection and Derating Curves

Based on our 2.30°C/W requirement and an 18W dissipation, the Aavid (Boyd) 513302B02500G is the exact part to spec. It is a TO-220 compatible extruded aluminum heatsink with a natural convection rating of roughly 2.2°C/W. It provides a 0.1°C/W safety margin without requiring a noisy cooling fan.

However, heatsinks only manage the silicon. If the ambient temperature inside your enclosure spikes to 60°C because a nearby relay bank is dumping heat, your TJ will push past 140°C. This is where the positive temperature coefficient resistor earns its keep.

Let's interpret the derating curve for the Bourns MF-R300 PTC. A derating curve plots the 'Hold Current' (Ihold) against ambient temperature.

  • At 20°C ambient: Ihold is 3.0A. The PTC passes our 1.5A load with a negligible voltage drop (under 0.08V).
  • At 40°C ambient: Ihold drops to ~2.4A. Still safe for our 1.5A load.
  • At 60°C ambient: Ihold drops to ~1.8A. We are now dangerously close to the trip threshold.
  • At 70°C ambient: Ihold drops below 1.5A. The PTC will begin to self-heat, its resistance will spike from 0.08Ω to over 100Ω, and it will choke the current to the pass transistor, saving the silicon from thermal runaway.
Warning: Never place a PTC thermistor directly on the heatsink fin if you want it to protect against ambient enclosure heat. Mount it on the PCB near the heat-generating cluster so it reads the true localized air temperature, not the artificially cooled fin temperature.

How Hot is Too Hot? Failure Signatures and Airflow

Knowing the exact thermal limits prevents catastrophic bench failures. Here is the breakdown of thermal thresholds and what they look like when breached.

How Hot is Too Hot?

For standard silicon pass transistors and MOSFETs, 125°C is the practical ceiling, and 150°C is the absolute destruct limit. For the PTC itself, the maximum surface temperature during a tripped state (when it is limiting fault current) is typically 120°C to 130°C. If the PTC surface exceeds 140°C, the polymer matrix can suffer irreversible physical damage, and it will not reset to its low-resistance state when power is removed.

What Airflow and Enclosure Changes Buy You

If you find your thermal margin is too tight, forced air is the cheapest fix. Adding a modest 10 CFM (cubic feet per minute) chassis fan across the Aavid 513302B02500G heatsink drops its RθSA from 2.2°C/W down to approximately 1.4°C/W. This buys you an extra 14.4°C of junction temperature headroom at 18W. Alternatively, adding 10mm of ventilation louvers to the top and bottom of your enclosure creates a natural convection chimney effect, typically dropping internal ambient by 5°C to 8°C.

Failure Signatures of Thermal Stress

Thermal failures rarely happen instantly; they leave forensic evidence. Look for these signatures:

  • Micro-cracking in PTC Epoxy: If the orange/brown epoxy coating on the PTC shows spiderweb cracks, it has tripped too many times or exceeded its maximum fault voltage. Replace it; its reset resistance will now be permanently higher.
  • Solder Joint Frosting: Dull, grainy, or cracked solder rings around the TO-220 leads indicate severe thermal cycling. The RθCS has likely increased due to the thermal pad pumping out from under the transistor.
  • Phenolic Odor and Discoloration: A brown halo on the FR4 PCB beneath the PTC means the component is operating continuously near its trip threshold, baking the board. You need a PTC with a higher hold current rating.

Decision Tree: Sizing Your Positive Temperature Coefficient Resistor

Selecting the right PTC requires matching the hold current to your steady-state load, while ensuring the trip current (usually 2x the hold current) is lower than the maximum safe current of your unprotected wiring and silicon. Use this decision matrix to lock in your BOM.

Condition / Load ProfileRequired Ihold at 20°CConcrete Part Pick (Bourns MF-R Series)
Load ≤ 0.8A, sensitive logic rails, max ambient 40°C 1.1A MF-R110 (0.07Ω Rmin)
Load 1.0A - 2.0A, motor drivers, max ambient 50°C 3.0A MF-R300 (0.04Ω Rmin)
Load 2.5A - 4.0A, high-power LED arrays, max ambient 40°C 5.0A MF-R500 (0.02Ω Rmin)
Load > 5.0A or high inrush capacitance N/A PTC unsuitable; use a traditional thermal-magnetic breaker.

For our 24V-to-12V, 1.5A linear pass stage, the decision path terminates cleanly: the steady-state load is 1.5A, and the maximum expected enclosure ambient is 50°C. According to the matrix, we require a 3.0A hold current at room temperature to account for the derating curve drop-off at elevated temperatures.

The final BOM selection is the Bourns MF-R300 positive temperature coefficient resistor. Pair it with the Aavid 513302B02500G heatsink, apply a 0.5mm silicone thermal pad torqued to 0.6 N-m, and your power stage is mathematically guaranteed to survive both steady-state operation and catastrophic cooling failures without permanent silicon damage.