When routing high-current paths on a printed circuit board, the transition from a surface trace to an inner layer relies entirely on vias. A standard 0.3mm (12 mil) drilled via with 25µm (1oz) plating handles roughly 1A to 1.5A of continuous DC current, assuming a conservative 10°C temperature rise. If your design requires more, you must parallel them. Relying on a PCB via current calculator removes the guesswork, translating IPC-2221 thermal models into exact drill sizes and plating requirements. Below is a practical guide to sizing your copper, avoiding prototyping pitfalls, and safely bringing up your first-spin board.
The Physics of Vias and Trace Sizing
A via is essentially a short, plated tube of copper connecting layers. Because the electroplating process inside a drilled hole is less uniform than surface copper deposition, the barrel wall thickness is typically 20µm to 25µm (roughly 0.5oz to 0.7oz copper), even if your outer layers are specified as 1oz (35µm). This means a via is often the thermal bottleneck in a high-current path.
Tools like the Saturn PCB Toolkit or online IPC-2221 nomographs calculate ampacity based on cross-sectional area and acceptable temperature rise. The industry standard reference, IPC-2221, provides the baseline formulas for these thermal limits. For power electronics, we typically design for a maximum 10°C to 20°C rise above ambient to prevent long-term dielectric degradation.
Trace Width vs. Current Capacity Reference
Before you route to a via, the surface trace must be wide enough to carry the load. The table below provides baseline values for external layer traces (10°C temperature rise, 50°C ambient). Internal layers require roughly 50% more width for the same current due to poorer heat dissipation.
| Trace Width (mils / mm) | 1oz Copper (35µm) Current | 2oz Copper (70µm) Current |
|---|---|---|
| 10 mil (0.25mm) | 0.6A | 1.0A |
| 20 mil (0.50mm) | 1.1A | 1.9A |
| 50 mil (1.27mm) | 2.3A | 4.0A |
| 100 mil (2.54mm) | 4.0A | 7.0A |
| 200 mil (5.08mm) | 7.2A | 12.5A |
Note: If you need to pass 15A through a 2oz copper layer, you need a trace wider than 200 mils, and you must use an array of at least ten 0.3mm vias to transition layers safely.
Breadboard-to-PCB Migration: What Survives the Jump?
Solderless breadboards are excellent for proving out logic, but they hide severe electrical sins. A standard breadboard jumper wire and contact clip can easily pass 1A without noticeable voltage drop, leading hobbyists to assume a single thin PCB trace or tiny via will do the same. It won't. Furthermore, breadboard contacts introduce 0.1Ω to 0.5Ω of resistance and significant parasitic inductance.
When migrating from a breadboard prototype to a custom PCB, use this checklist to ensure the mistakes that "worked" on the bench don't cause failures in silicon:
- Decoupling Capacitor Placement: On a breadboard, a 100nF capacitor might sit three inches away from an IC. On a PCB, it must be placed less than 2mm from the VCC and GND pins, with vias dropping directly to the ground plane. Distance equals inductance, which renders high-frequency bypassing useless.
- Power Rail Bottlenecks: Breadboard power rails handle roughly 1A before voltage drop becomes severe. PCB power rails should be replaced with solid copper pours or 50+ mil traces. Never rely on a single 0.3mm via to carry the main supply current that your breadboard rail handled easily.
- High-Frequency Ringing: Long jumper wires act as loop antennas, picking up EMI and causing ringing on switching nodes. A PCB requires a continuous, unbroken ground plane directly beneath high-speed or switching signals to provide a tight return current path.
- Ground Loops and Star Grounding: Daisy-chaining grounds on a breadboard often works for low-speed DC. On a PCB, high-current return paths (like motor drivers) must be star-grounded or isolated from sensitive analog grounds to prevent ground bounce from resetting your microcontroller.
First-Spin Board Testing and Workshop Safety
Applying full power to a freshly assembled board is a gamble you can rig in your favor. A proper first-spin test sequence isolates faults before they turn into shrapnel or melted silicon.
- Visual Inspection: Use a 10x loupe or digital microscope. Inspect QFN and QFP packages for solder bridges. Check that via tenting hasn't trapped flux inside the barrel, which can cause long-term corrosion.
- DMM Continuity Check: Before applying power, set your multimeter to continuity or resistance mode. Probe VCC to GND. You should see a brief capacitive spike that settles to an open loop (OL) or high resistance (typically >1kΩ). If it reads < 5Ω, you have a short. Stop and find it.
- Current-Limited Power Up: Never use a raw battery or unregulated wall wart for first power-up. Use a bench power supply set to the exact nominal voltage, and set the Current Limit (CC mode) to 50mA-100mA above your expected idle current. If the board pulls max current immediately, the supply will fold back, saving your components.
- Thermal Profiling: Under load, use a thermal camera or a K-type thermocouple taped to the board. Check the temperature of your power vias and voltage regulators. If a via barrel exceeds 60°C above ambient, your PCB via current calculator assumptions were too aggressive; add more vias or increase copper weight on your next revision.
Workshop Safety: Soldering and Fume Extraction
When reworking vias or soldering heavy ground planes, thermal mass requires high iron temperatures, which vaporizes rosin-based flux. Always use an active fume extractor with a HEPA/carbon filter positioned within 6 inches of the soldering plume. Inhaling colophony fumes is a known respiratory sensitizer.
Alloy and Temperature Specifics:
- SAC305 (Lead-Free): Melts at 217°C. Set your iron tip to 350°C - 380°C. Use a chisel tip for thermal transfer to ground planes.
- Sn63/Pb37 (Leaded Eutectic): Melts at 183°C. Set your iron tip to 315°C - 330°C.
Warning: Never exceed 400°C on a standard FR-4 board. Excessive heat will cause the epoxy to exceed its glass transition temperature (Tg), leading to via barrel delamination and pad lifting.
Frequently Asked Questions
How many vias do I need for a 5A power rail?
A standard 0.3mm drilled via with 25µm plating handles roughly 1A for a conservative 10°C temperature rise. For a 5A continuous load, you should use a minimum of 6 to 8 vias in parallel. Current does not share perfectly equally among parallel vias due to minor plating variations and trace routing asymmetries, so a 20-30% overhead margin is standard engineering practice.
Does a PCB via current calculator account for thermal relief?
Most basic IPC-2221 calculators assume a solid, 360-degree copper connection to the via pad. Thermal relief spokes (the cross-shaped connections used to make hand-soldering easier) severely restrict the cross-sectional area for current flow and increase thermal resistance. If a via is carrying high current (e.g., >2A), you must disable thermal reliefs in your EDA software and use solid pads to prevent the via from acting as a bottleneck or a localized heat source.
What is the maximum current a 1mm via can handle?
A 1.0mm drilled hole with standard 25µm (1oz) plating has an inner circumference of roughly 3.14mm. This equates to the cross-sectional area of a 125-mil wide surface trace. Depending on your acceptable temperature rise, a 1mm via can safely carry 5A to 7A. If space is constrained and you can tolerate a 20°C rise, it can push closer to 8A, but 10°C is vastly preferred for long-term reliability and to prevent localized FR-4 charring.
Can I use a PCB via current calculator for high-frequency RF signals?
No. Current calculators only address DC and low-frequency AC thermal limits (ampacity). RF and high-speed digital signals (like PCIe or USB 3.0) require impedance-controlled vias. At high frequencies, the via stub acts as a parasitic capacitor, causing signal reflections. Designing for RF requires 3D electromagnetic simulation, via back-drilling, and ground stitching, which is an entirely separate discipline from DC current thermal management.
