Op-amp input bias current is the small DC current that must flow into or out of an operational amplifier’s input pins to properly bias its internal transistors. In a real circuit, this current flows through your external source and feedback resistors, creating unwanted voltage drops that manifest as DC offset errors at the output. Designers commonly confuse it with input offset voltage (an internal transistor mismatch) or input offset current (the slight difference between the bias currents of the inverting and non-inverting pins). Think of the op-amp inputs as two water meters that require a minimum trickle of flow to spin their internal gears; that unavoidable trickle is the bias current.
The Physics of Bias Current (and Common Confusions)
The magnitude of this current depends entirely on the op-amp's input stage topology. Legacy bipolar junction transistor (BJT) op-amps, like the ubiquitous LM741, require actual base current to turn on the input transistors. This results in bias currents in the nanoamp range. Modern CMOS op-amps, however, use insulated gates. Their bias current is merely the leakage current of the input protection diodes, dropping the requirement to the picoamp range.
- Input Bias Current ($I_B$): The average of the two input currents. $(I_{B+} + I_{B-}) / 2$.
- Input Offset Current ($I_{OS}$): The difference between the two input currents. $|I_{B+} - I_{B-}|$. This is what causes residual error after you compensate for bias current.
- Input Offset Voltage ($V_{OS}$): A completely separate error source caused by internal transistor mismatch, measured in microvolts or millivolts.
When reading datasheets, always check the temperature specification. BJT bias currents are relatively stable over temperature, but CMOS leakage currents double approximately every 10°C. A CMOS op-amp with a 1pA bias current at 25°C might exhibit 32pA at 75°C, which can ruin a high-impedance sensor circuit if you only designed for room temperature.
Worked Example: Calculating and Canceling DC Offset
Let’s look at a standard inverting amplifier configuration to see how this current generates an output error, and how to fix it.
The Circuit:
- Op-Amp: LM741 (BJT input, typical $I_B$ = 80nA, flowing into the pins)
- Input Resistor ($R_{in}$): 100kΩ
- Feedback Resistor ($R_f$): 100kΩ
- Non-inverting pin: Tied directly to GND (0Ω)
Step 1: Calculate the uncompensated error
Because the non-inverting pin is grounded, the op-amp's negative feedback forces the inverting pin to a virtual ground (0V). However, the inverting pin still demands 80nA of bias current. Since the input signal is 0V, this current must be supplied entirely through the feedback resistor $R_f$.
Using Ohm’s Law, the voltage drop across $R_f$ is:
$V_{drop} = I_B \times R_f = 80\text{nA} \times 100\text{k}\Omega = 8\text{mV}$
Because the current flows from the output, through $R_f$, and into the inverting pin, the output voltage must sit at -8mV to sustain this flow. Even with 0V at the input, your output reads -8mV. If your gain was 100 (e.g., $R_f$ = 1MΩ), this error would balloon to -80mV.
Step 2: Add a compensation resistor
To cancel this, we add a compensation resistor ($R_{comp}$) between the non-inverting pin and GND. The golden rule for $R_{comp}$ is that it must equal the parallel equivalent of the resistors connected to the inverting pin:
$R_{comp} = R_{in} || R_f = 100\text{k}\Omega || 100\text{k}\Omega = 50\text{k}\Omega$
Now, the 80nA bias current flowing into the non-inverting pin creates a voltage drop across $R_{comp}$:
$V_{+} = 80\text{nA} \times 50\text{k}\Omega = 4\text{mV}$
The op-amp adjusts its output to force the inverting pin to match the non-inverting pin (4mV). The currents balance out symmetrically, and the output offset voltage drops to near zero (limited only by the much smaller input offset current).
Where You Meet This in Practice
You rarely need to worry about bias current in low-impedance audio circuits or power supply feedback loops. It becomes a critical failure point in specific high-impedance applications:
- Transimpedance Amplifiers (TIAs): When converting the tiny current output of a photodiode into a voltage, you use a massive feedback resistor (often 1MΩ to 100MΩ). A 10nA bias current flowing through a 10MΩ resistor creates a 100mV offset, completely blinding your sensor to low-light signals.
- Piezoelectric Sensors: Piezo elements have extremely high source impedance. If your op-amp draws bias current from the piezo element, it will charge or discharge the element's internal capacitance, causing the signal to droop or baseline-shift over time.
- Active Filters: High-order Sallen-Key filters use large resistor values to keep capacitor sizes physically small. Uncompensated bias currents will shift the DC operating point of each cascade stage, potentially driving the final output into rail saturation.
The Decision Tree: Choosing the Right Op-Amp
Do not blindly add compensation resistors to modern designs. In many cases, selecting the correct input topology eliminates the need for $R_{comp}$ entirely. Use this decision matrix to select your part.
| Source / Feedback Impedance | Best Input Stage | Concrete Part Pick | Why This Wins |
|---|---|---|---|
| < 1kΩ | Precision BJT | OPA227 | Bipolar inputs offer the lowest voltage noise ($nV/\sqrt{Hz}$). At low impedances, the ~10nA bias current generates negligible voltage drop. |
| 1kΩ to 100kΩ | JFET or Bias-Cancelled BJT | OPA211 / TL072 | Balances low voltage noise with manageable bias currents (~1pA to ~30pA). Ideal for standard active filters and strain gauge bridges. |
| > 100kΩ (up to 100MΩ) | CMOS | TLV9001 / OPA140 | Ultra-low bias current (~1pA). Prevents massive DC offsets in photodiode TIAs and high-Z sensor interfaces without needing compensation networks. |
FAQ: Troubleshooting Bias Current Issues
My output is saturated at the positive rail, but my inputs are grounded. What happened?
You likely have an open circuit on one of your input paths, or your source impedance is too high for a BJT op-amp. If the non-inverting pin is left floating (or connected through a blown fuse/high-Z sensor), the bias current has nowhere to flow. The input pin will charge up to the supply rail, and the op-amp will amplify this massive differential voltage, slamming the output into saturation. Always ensure a DC path to ground for both inputs.
I added a compensation resistor, but I still have a 2mV offset. Why?
You are now seeing the effects of input offset current ($I_{OS}$) and input offset voltage ($V_{OS}$). The compensation resistor only cancels the error if the bias currents on both pins are perfectly identical. In reality, they differ slightly (the offset current). Furthermore, the internal transistor mismatch ($V_{OS}$) adds its own error, multiplied by your circuit's noise gain. To fix this, you must upgrade to a precision op-amp with laser-trimmed offset specifications.
Should I use a FET or CMOS op-amp for a 1MΩ feedback resistor?
Go with CMOS. While JFETs (like the TL072) have low bias current at room temperature (~50pA), CMOS inputs (like the TLV9001 at ~1pA) are fundamentally superior for high-impedance nodes because their gate leakage is orders of magnitude lower, keeping your TIA baseline stable across temperature variations.
If you are unsure of your exact source impedance, or if you want a universal, modern 'drop-in' part for low-power designs that eliminates bias current headaches entirely, default to a CMOS op-amp like the TLV9001. Its 1pA bias current renders compensation resistors obsolete in 95% of hobbyist and commercial sensor interfaces, allowing you to focus on voltage noise and bandwidth instead.
