The Direct Answer: What is an Op Amp Unity Gain Buffer?
An op amp unity gain buffer (also called a voltage follower) is a closed-loop operational amplifier circuit configured to output exactly the same voltage applied to its non-inverting input. It provides a voltage gain of exactly 1 (0 dB), meaning it does not amplify the signal voltage. Instead, it amplifies current and transforms impedance.
You need a unity gain buffer when a high-impedance signal source (like a piezoelectric sensor, a high-value resistor voltage divider, or a microcontroller DAC) must drive a low-impedance load (like a 50-ohm coaxial cable, an ADC sampling capacitor, or a power transistor gate). The buffer presents a massive input impedance (often >100 MΩ) to the source, preventing the source from sagging, while presenting a near-zero output impedance (often <1 Ω) to the load, delivering the necessary current without voltage drop.
Symbol, Pinout, and the Standard Application Circuit
The standard schematic symbol for an op amp is a triangle with two inputs and one output. The non-inverting input is marked with a plus (+), and the inverting input is marked with a minus (-). In a unity gain buffer configuration, the output pin is tied directly back to the inverting input pin, creating 100% negative feedback.
Standard 8-Pin DIP/SOIC Pinout
While single and quad packages exist, the dual op-amp in an 8-pin package is the industry workhorse. Here is the standard pinout (viewed from the top, with the notch/dot at the top):
- Pin 1: Output A
- Pin 2: Inverting Input A (-)
- Pin 3: Non-Inverting Input A (+)
- Pin 4: V- (Negative Supply or Ground)
- Pin 5: Non-Inverting Input B (+)
- Pin 6: Inverting Input B (-)
- Pin 7: Output B
- Pin 8: V+ (Positive Supply)
Complete Application Circuit
To build a robust buffer for Channel A on a standard 5V single-supply system, use the following exact component list and wiring:
- U1: MCP6002 (Dual Rail-to-Rail Op Amp).
- C1 & C2: 100 nF (0.1 µF) X7R MLCC ceramic capacitors.
- R_iso: 22 Ω to 47 Ω thick-film resistor (crucial for stability, see below).
Wiring Steps:
- Connect your input signal to Pin 3 (Non-Inverting Input A).
- Connect Pin 1 (Output A) directly to Pin 2 (Inverting Input A). This is the feedback loop.
- Connect Pin 8 (V+) to your 5V rail. Place C1 (100 nF) physically within 2 mm between Pin 8 and Pin 4.
- Connect Pin 4 (V-) to system Ground.
- Connect the output from Pin 1 to your load through the R_iso (22 Ω) resistor. The feedback loop (Pin 2) must tap directly at Pin 1, before R_iso.
Operating Regions and Spec-Sheet Limits
An op amp is not an ideal mathematical block; it is a physical silicon device bound by supply rails and internal transistor physics. Understanding these operating regions prevents you from designing a circuit that simulates perfectly but fails on the bench.
| Operating Region | Condition | Typical Behavior (5V Supply) | Design Consequence |
|---|---|---|---|
| Linear Region | V_in is within common-mode limits; I_out is within short-circuit limits. | V_out tracks V_in within microvolts. Output impedance is < 1 Ω. | This is where the buffer does its job. Ensure your input signal stays at least 100 mV away from the supply rails unless using a true RRIO (Rail-to-Rail I/O) part. |
| Positive Saturation | V_in exceeds the positive supply or common-mode max. | V_out clamps to V+ minus the headroom voltage (e.g., 4.8V for RRIO, or 3.5V for older parts like LM358). | Signal clipping. The feedback loop is broken, and the op amp cannot correct the error. |
| Negative Saturation | V_in drops below the negative supply or common-mode min. | V_out clamps to V- plus the headroom voltage (e.g., 0.05V for RRIO, or 0V for single-supply parts). | Signal clipping. If driving a single-supply ADC, this just reads as 0. |
| Slew-Rate Limiting | The rate of change of V_in exceeds the op amp's internal compensation capacitor charge rate. | V_out ramps at a fixed maximum speed (e.g., 0.5 V/µs for LM358, 1.6 V/µs for MCP6001). Sine waves turn into triangles. | High-frequency distortion. Calculate required slew rate: SR = 2 * π * f * V_peak. If your signal needs 5 V/µs, an LM358 will fail. |
Decision Tree: Picking the Right Op Amp for Your Buffer
Do not just grab the first op amp in your parts bin. The wrong choice will result in phase inversion, crossover distortion, or oscillation. Use this decision path to select your part.
| Your Primary Constraint | If this matters most... | Concrete Pick (Part Number) | Key Ratings |
|---|---|---|---|
| Ultra-Low Cost / Legacy | You need a dual buffer for < $0.20, running on 9V-12V, and don't care about crossover distortion near 0V. | LM358 (TI / STMicro) | Supply: 3V-32V. Slew: 0.3 V/µs. GBP: 1 MHz. Output does NOT swing to positive rail. |
| Single-Supply 3.3V/5V General Purpose | You are buffering a microcontroller DAC or reading a sensor on a 3.3V or 5V logic rail and need rail-to-rail swing. | MCP6001 (Single) or MCP6002 (Dual) | Supply: 1.8V-6.0V. Slew: 0.6 V/µs. GBP: 1 MHz. True RRIO. Cost: ~$0.35. |
| High Precision / Low Offset | You are buffering a thermocouple, strain gauge, or high-resolution (16-bit+) ADC where millivolt offsets ruin accuracy. | OPA340 (Single) or OPA344 (Dual) | Supply: 2.7V-5.5V. V_os max: 500 µV. Slew: 6 V/µs. Cost: ~$2.50. |
| High Speed / Video | You are buffering a high-speed ADC driver, composite video, or a >1 MHz signal. | OPA350 (Single) or THS3091 | Supply: 2.5V-5.5V. Slew: 22 V/µs. GBP: 38 MHz. Cost: ~$3.00. |
Biasing, Stability, and Driving Capacitive Loads
A unity gain buffer is the most demanding configuration for an op amp's stability loop. Because the feedback factor (β) is 1 (100% of the output is fed back), the loop gain is at its absolute maximum, leaving the smallest phase margin. If you introduce additional phase shift, the buffer will oscillate.
The Capacitive Load Problem
Every op amp has an internal open-loop output resistance (R_o), typically between 10 Ω and 100 Ω. When you connect a capacitive load (C_load) — such as a long shielded cable, a MOSFET gate, or an ADC sampling network — R_o and C_load form a low-pass filter. This adds a pole to the feedback loop, introducing up to 90° of additional phase lag. If the total phase shift hits 180° while the loop gain is still > 1, your buffer becomes a high-frequency oscillator.
The Fix: The Isolation Resistor (R_iso)
Never connect a heavy capacitive load directly to the op amp output. Instead, place a small resistor (R_iso) between the op amp output pin and the capacitive load.
How to size R_iso: A value between 22 Ω and 100 Ω is usually sufficient to isolate the capacitance without causing a significant DC voltage drop (since the load current is usually small).
Critical Wiring Rule: The feedback trace must connect directly to the op amp output pin (Pin 1), before R_iso. If you take the feedback after R_iso, the load capacitor is back inside the feedback loop, defeating the purpose of the resistor and guaranteeing oscillation.
Input Biasing for AC Signals
If you are buffering an AC signal (like audio) on a single-supply system, you cannot let the input swing below ground. You must bias the non-inverting input to a mid-supply DC voltage (e.g., 2.5V on a 5V system) using a resistive voltage divider (two 10kΩ resistors). Place a 10 µF decoupling capacitor from the divider midpoint to ground to kill power-supply noise, and AC-couple your input signal through a 1 µF series capacitor. The buffer will then output the AC signal riding on a 2.5V DC offset.
Failure Modes and Multimeter Troubleshooting
Op amps rarely fail gracefully. They usually fail due to overvoltage on the inputs (blowing internal ESD diodes), excessive output current (melting internal bond wires), or thermal runaway. Here is how to test a suspected dead buffer using a standard digital multimeter (DMM). For deeper theoretical failure analysis, refer to the Texas Instruments Precision Labs Op Amp training series or the Analog Devices Op Amp Basics library.
Step 1: The Power-Off Diode Test (Checking for Blown Silicon)
- Remove all power from the circuit. Discharge any large capacitors.
- Set your DMM to the Diode Test mode.
- Measure between the input pins (Pin 2 and Pin 3) and the supply pins (Pin 4 and Pin 8). You are checking the internal ESD protection diodes.
- Expected Reading: You should read a forward voltage drop of roughly 0.5V to 0.8V in one direction, and 'OL' (Open Loop) in the reverse direction.
- Failure Indicator: If you read 0.00V (short circuit) or 0.1V in both directions, the internal silicon junction has melted. The chip is dead. Desolder and replace.
Step 2: The Power-On Voltage Test (Checking for Latch-Up or Saturation)
- Apply power to the circuit. Ensure the input signal is within the valid common-mode range.
- Set your DMM to DC Voltage mode.
- Measure the voltage at Pin 3 (Input) and Pin 1 (Output) relative to ground.
- Expected Reading: The voltage at Pin 1 should match Pin 3 within 1 mV to 5 mV (depending on the part's input offset voltage).
- Failure Indicator 1 (Stuck to Rail): If Pin 1 reads exactly V+ or V- regardless of what is on Pin 3, the internal output stage is shorted, or the op amp has latched up due to an input overvoltage event. Power cycle the board; if it remains stuck, replace the IC.
- Failure Indicator 2 (Oscillation): If your DMM reads a random, fluctuating voltage, or if the IC is physically hot to the touch with no load connected, the buffer is oscillating at high frequency. Your DMM cannot read the AC frequency, so it displays an averaged DC garbage value. Check your R_iso placement and ensure your feedback trace is short.
