The standard op amp symbol is a triangle with inverting (–) and non-inverting (+) inputs, but schematics vary wildly based on whether you follow US (IEEE) or European (IEC) drafting standards. More importantly, physical pinouts hide traps like omitted power rails and offset nulls that will fry your board or cause silent oscillation if misunderstood. Below is the definitive bench reference for reading, drawing, and wiring operational amplifiers.
The Core Op Amp Symbol Reference Table
Before wiring a physical IC, you must map the schematic symbol to the silicon. This table defines every element you will encounter on a datasheet or schematic, bridging the gap between abstract symbols and physical pins.
| Symbol Element | IEEE 315 (US) Representation | IEC 60617 (EU) Representation | Physical Pin Reality & Bench Notes |
|---|---|---|---|
| Main Body | Right-pointing triangle | Rectangle with internal '∞' or triangle | Represents the high-gain differential amplifier stage. Does not indicate physical package shape. |
| Non-Inverting Input (+) | '+' sign at the top/left input | '+' sign inside the rectangular block | Signal here appears at the output with the same phase. High impedance (often >1MΩ on BJT, >10^12Ω on CMOS). |
| Inverting Input (–) | '–' sign at the bottom/left input | '–' sign inside the rectangular block | Signal here appears at the output 180° out of phase. The virtual ground node in standard feedback loops. |
| Positive Supply (VCC / VDD) | Line entering top of triangle | Line entering top edge of rectangle | Often omitted in schematics to reduce clutter. Must be physically connected and bypassed with a 100nF X7R capacitor to ground. |
| Negative Supply (VEE / VSS) | Line entering bottom of triangle | Line entering bottom edge of rectangle | Also frequently omitted. Can be tied to GND in single-supply designs, but requires rail-to-rail input/output (RRIO) op-amps. |
| Output (VOUT) | Line exiting the right point | Line exiting the right edge | Low impedance source. Never tie directly to VCC/VEE or ground; always use a series resistor (e.g., 100Ω) if driving heavy capacitive loads. |
| Offset Null | Lines entering the top/bottom edges | Rarely shown on IEC logic blocks | Used with a 10kΩ trimpot to zero out DC input offset voltage. Left unconnected (floating) on modern precision op-amps. |
Regional Standards: IEEE 315 vs. IEC 60617
When reading schematics from international teams or legacy military hardware, the op amp symbol will change shape based on the governing drafting standard.
IEEE Std 315 (ANSI Y32.2): Dominant in North America, hobbyist EDA tools (KiCad, Eagle), and most modern Texas Instruments datasheets. The triangle is universally recognized and visually implies signal flow from left to right. The '+' and '–' inputs are strictly placed on the left vertical edge.
IEC 60617-6: Standard in Europe and many enterprise-level CAD environments (like Altium Designer default libraries). The op-amp is drawn as a rectangular box. Inside the box, an infinity symbol (∞) or a smaller triangle denotes the amplification function. The inputs and outputs are marked with their respective '+' and '–' identifiers inside the box boundaries.
If you are repairing older military or aerospace gear, you may encounter the MIL-STD-806 symbol, which looks like a triangle but places the power supply pins on the left side alongside the inputs, rather than top and bottom. Always verify the drawing's title block standard before assuming pin functions.
Table Rows & Schematic Elements People Get Wrong
Even experienced makers make critical errors when translating the op amp symbol to a physical breadboard or PCB. Here are the most common failure points and how to resolve them.
1. Confusing Input Polarity with Power Supply Polarity
The '+' and '–' on the op amp symbol denote signal phase relationship, not DC power polarity. Applying +12V to the non-inverting (+) input pin while leaving the power rails unconnected will not power the chip; it will likely forward-bias internal ESD protection diodes and destroy the silicon. Power always enters via VCC and VEE, regardless of the input symbols.
2. The 'Hidden' Power Pins Trap
Schematic designers routinely hide VCC and VEE pins, relying on global power nets. If you are wiring a physical IC like an LM741 or TL072 on a breadboard based solely on a simplified schematic, you will forget to wire Pins 7 and 4. Rule of thumb: Always assume an op-amp requires physical power connections unless it is specifically an energy-harvesting or passive component (which op-amps are not).
3. Safe Interpretation of Faded or Missing Markings
When salvaging op-amps from old PCBs, the laser-etched part number is often worn away. You can still identify the pinout by examining the physical package geometry:
- The Notch: A half-circle cutout on one end of the DIP/SOIC package. Pin 1 is always to the immediate left of the notch when the text is oriented correctly.
- The Chamfer: On SOIC packages, one corner is physically cut off (chamfered). This corner is always Pin 1.
- The Dot: A small indented or laser-etched circle. It is located within 1mm of Pin 1.
- Verification: Use a multimeter in diode-test mode. Measure between the suspected Pin 4 (V-) and the substrate or ground plane. You should read a standard silicon diode drop (0.5V - 0.7V) due to the internal substrate diode. Identifying IC pins correctly prevents catastrophic reverse-polarity wiring.
Physical Pinout Matrix: 8-Pin and 14-Pin DIP/SOIC
The vast majority of discrete op-amps come in 8-pin (single or dual) or 14-pin (quad) packages. Below is the exact pin mapping for the industry-standard footprints.
| Pin # | 8-Pin Single (e.g., LM741) | 8-Pin Dual (e.g., TL072, NE5532) | 14-Pin Quad (e.g., LM324, TL084) |
|---|---|---|---|
| 1 | Offset Null 1 | Output A | Output A |
| 2 | Inverting Input (–) | Inverting Input A (–) | Inverting Input A (–) |
| 3 | Non-Inverting Input (+) | Non-Inverting Input A (+) | Non-Inverting Input A (+) |
| 4 | V– (VEE / Negative Supply) | V– (VEE / Negative Supply) | V+ (VCC / Positive Supply)* |
| 5 | Offset Null 2 | Non-Inverting Input B (+) | Non-Inverting Input B (+) |
| 6 | Output | Inverting Input B (–) | Inverting Input B (–) |
| 7 | V+ (VCC / Positive Supply) | Output B | Output B |
| 8 | No Connect (NC) | V+ (VCC / Positive Supply) | Output C |
| 9-14 | N/A | N/A | Remaining C/D stages & V– (Pin 11) |
Decision Path: Which Symbol and Package to Use
When designing a new schematic or laying out a PCB, follow this decision tree to select the correct symbol representation and physical package. This path terminates in a concrete recommendation for 95% of modern maker and commercial sensor designs.
| Condition / Requirement | Action / Selection |
|---|---|
| Designing for a US-based team, hobbyist open-source hardware, or using KiCad/Eagle? | Use the IEEE 315 Triangle Symbol. It is universally understood and maps cleanly to standard netlist generators. |
| Designing for European enterprise compliance, IEC 60617 strict adherence, or Altium default libraries? | Use the IEC 60617 Rectangular Block. Ensure the internal '∞' marker is enabled in your CAD library properties. |
| Target system is 5V or 3.3V (e.g., ESP32, Arduino, Raspberry Pi Pico) with single-supply rails? | Select a Rail-to-Rail Input/Output (RRIO) Op-Amp. Legacy parts like the LM741 will clip signals above 3.5V on a 5V rail. |
| Need a default, robust, low-cost dual op-amp for general 3.3V/5V sensor conditioning and active filtering? | Pick the TLV2372 (8-pin SOIC). It operates from 2.7V to 16V, features RRIO, has a 3MHz bandwidth, and costs ~$0.80 in single quantities. Route 100nF decoupling caps within 2mm of Pins 4 and 8. |
By standardizing on the IEEE triangle symbol for your schematics and defaulting to the 8-pin SOIC TLV2372 for low-voltage microcontroller front-ends, you eliminate the most common schematic-to-PCB translation errors while ensuring your signals remain clean and unclipped.
