Op Amp Integrator and Differentiator Lab Manual: Bench Build Guide

If you are reading this op amp integrator and differentiator lab manual, you likely already know the textbook math: an integrator outputs the time-integral of the input voltage, and a differentiator outputs the rate of change. But textbook equations assume ideal components. On the bench, parasitic capacitance, input bias currents, and slew-rate limits will quickly turn your elegant calculus circuits into high-frequency oscillators or saturated rails. This guide bridges the gap between theory and the workbench, giving you exact component values, biasing networks, and the troubleshooting steps needed to get clean waveforms on your oscilloscope.

Selecting the Right Op Amp and Understanding the Pinout

Not all operational amplifiers are created equal when it comes to calculus circuits. Integrators are highly sensitive to input bias current (which charges the feedback capacitor and causes DC drift), while differentiators are notoriously prone to high-frequency noise and oscillation.

The TL072 Pinout (8-Pin DIP)

Before wiring, orient the IC with the notch facing left. The pinout for the dual TL072 is as follows:

• Pin 1: Output A
• Pin 2: Inverting Input A (-)
• Pin 3: Non-Inverting Input A (+)
• Pin 4: V- (Negative Supply, e.g., -12V)
• Pin 5: Non-Inverting Input B (+)
• Pin 6: Inverting Input B (-)
• Pin 7: Output B
• Pin 8: V+ (Positive Supply, e.g., +12V)

Biasing for the Job

How you bias the non-inverting input dictates your output reference. In a dual-supply setup (±12V), tie Pin 3 directly to circuit ground (0V). Your output will swing symmetrically above and below 0V. In a single-supply setup (e.g., +12V and GND), you must create a virtual ground. Use a voltage divider with two 10kΩ resistors between V+ and GND, bypassed by a 10µF capacitor to ground, and feed that 6V midpoint to Pin 3. This centers your AC waveforms at 6V, preventing the bottom half of your signal from clipping against the 0V rail.

The Core Circuits: Integrator and Differentiator Builds

Below are the exact component values for a robust, bench-tested integrator and differentiator. These values include the critical "fix" components that textbooks often omit but are mandatory for real-world stability.

1. The Practical Integrator

A pure integrator uses a resistor on the input and a capacitor in the feedback loop. However, any tiny DC offset voltage will be integrated over time, slowly charging the capacitor until the op-amp saturates at the supply rail. To prevent this, we add a high-value feedback resistor ($R_f$) in parallel with the capacitor to provide DC feedback and stabilize the operating point.

• $R_{in}$ (Input Resistor): 10kΩ
• $C_f$ (Feedback Capacitor): 100nF (Film or C0G/NP0 ceramic; avoid X7R for low distortion)
• $R_f$ (DC Stabilization Resistor): 1MΩ (Limits low-frequency gain to 100)
• $R_{comp}$ (Non-inverting to GND): 10kΩ (Matches $R_{in}$ to minimize bias current offset)

Time Constant ($\tau$): $R_{in} \times C_f = 10k\Omega \times 100nF = 1 ms$. This circuit will accurately integrate signals above 160 Hz.

2. The Practical Differentiator

A pure differentiator uses a capacitor on the input and a resistor in the feedback loop. The problem? The gain increases at 20dB/decade. At high frequencies, the op-amp amplifies its own internal noise and stray breadboard capacitance, resulting in violent oscillation. We fix this by adding a small series input resistor ($R_s$) and a small feedback capacitor ($C_f$) to roll off the high-frequency gain.

• $C_{in}$ (Input Capacitor): 10nF
• $R_s$ (Series Limiting Resistor): 100Ω (Limits high-frequency gain)
• $R_f$ (Feedback Resistor): 10kΩ
• $C_f$ (Feedback Phase-Lead Cap): 10pF (Compensates for stray capacitance)

Op Amp Operation Regions Table

When probing your circuits, you must know which region the op-amp is operating in. The table below outlines the electrical boundaries for a TL072 on ±12V rails.

Bench Scenario: When the Differentiator Oscillates

Let’s walk through a real-world lab scenario that trips up almost every engineering student and hobbyist the first time they build a differentiator on a solderless breadboard.

The Setup

You wire up the practical differentiator circuit above using a TL072 on ±12V rails. You connect a function generator to the input, set to a 1kHz triangle wave, 2V peak-to-peak (Vpp). You attach an oscilloscope probe (set to 10x attenuation) to Pin 1 (Output A) to verify the math. A triangle wave has a constant slope, so its derivative should be a clean square wave.

The Numbers

Let’s calculate the expected output. A 1kHz triangle wave with 2Vpp has a peak amplitude of 1V. It takes 0.5ms to swing from -1V to +1V (a 2V change).
The slope ($dV/dt$) is $2V / 0.5ms = 4000 V/s$.
The ideal differentiator equation is $V_{out} = -R_f \times C_{in} \times (dV/dt)$.
$V_{out} = -10,000 \times 10 \times 10^{-9} \times 4000 = -0.4V$.
You expect to see a clean square wave swinging between +0.4V and -0.4V.

The Outcome

You power on the circuit. The oscilloscope does not show a clean 0.4V square wave. Instead, the screen is filled with a massive 8Vpp signal that looks like a square wave, but the flat tops and bottoms are buried under a violent, fuzzy 500kHz high-frequency ringing. The op-amp is oscillating and slamming into the supply rails.

What Went Wrong (and the Fix)

The textbook circuit failed because it ignored parasitic capacitance. The solderless breadboard introduces roughly 2pF to 5pF of stray capacitance between adjacent rows. Your 10x oscilloscope probe adds another 10pF to 15pF of capacitance at the output node. In a differentiator, the feedback resistor ($R_f$) interacts with this stray output capacitance to create a low-pass filter pole in the feedback path. This pole introduces phase lag, destroying the op-amp’s phase margin and causing it to oscillate at the frequency where the loop gain crosses unity.

The Fix: This is exactly why we included the 10pF feedback capacitor ($C_f$) and the 100Ω series input resistor ($R_s$) in the component list. The 10pF capacitor provides a high-frequency bypass path across the 10kΩ resistor, neutralizing the phase lag caused by the stray breadboard capacitance. The 100Ω resistor limits the maximum high-frequency noise gain to a safe ratio. Once these two components are added, the 500kHz ringing vanishes, leaving the exact 0.4V square wave the math predicted.

Troubleshooting and Multimeter Testing

When your circuit outputs a flatline or a stuck rail voltage, you need a systematic way to isolate the fault. Here is how to test the op-amp and the surrounding network using a standard digital multimeter (DMM).

In-Circuit DC Voltage Checks

Power the circuit and set your DMM to DC Volts. Black probe on circuit ground, red probe on the IC pins.

1. Check Power Rails: Measure Pin 8 (should be +12V) and Pin 4 (should be -12V). If Pin 4 reads 0V, your negative supply is dead or the breadboard rail is discontinuous.
2. Check the Virtual Short: Measure Pin 2 (Inverting) and Pin 3 (Non-Inverting). In a properly functioning linear circuit, these two voltages must be nearly identical (within 1-2 mV). If Pin 3 is at 0V (ground) and Pin 2 is at 4V, the op-amp has lost its virtual short. It is either saturated, dead, or wired incorrectly.
3. Check the Output: Measure Pin 1. If it reads exactly +10.5V or -10.5V, the op-amp is saturated. For an integrator, this usually means the input capacitor is leaky, or the 1MΩ stabilization resistor is missing/broken, allowing DC offset to wind up the output.

Out-of-Circuit Diode Mode Testing

If the in-circuit voltages point to a dead IC, remove the TL072 from the breadboard. Set your DMM to Diode Test mode. The internal ESD protection diodes on the inputs allow you to perform a basic health check.

• Place the red probe on Pin 4 (V-) and the black probe on Pin 2 (In-). You should read a standard silicon diode drop (approx. 0.6V to 0.7V).
• Reverse the probes; it should read "OL" (Open Loop).
• Repeat between Pin 4 and Pin 3 (In+).
• If any input pin reads 0.00V (shorted) or "OL" in both directions (open), the internal JFET structure or ESD diodes are blown. Discard the IC. (For more on op-amp input protection and failure modes, refer to the Analog Devices Op Amp Education Library).

Lab Manual Quick-Reference Checklist

Keep this checklist at your bench when building calculus circuits to avoid the most common pitfalls.

• Capacitor Selection: Never use high-K dielectric ceramics (like X7R or Y5V) for $C_f$ or $C_{in}$. They exhibit severe voltage coefficients and microphonic noise. Always use C0G/NP0 ceramics or polypropylene film capacitors for accurate integration.
• Reset Switch: For precision integrators, wire a momentary pushbutton switch in parallel with the feedback capacitor. This allows you to discharge the capacitor and "reset" the integrator to 0V before starting a measurement run.
• Probe Compensation: Before measuring a differentiator’s fast edges, ensure your oscilloscope probe is properly compensated using the scope’s built-in square wave calibrator. An under-compensated probe will artificially round the edges of your differentiated square wave, leading you to falsely believe the op-amp is slew-rate limited.
• Layout Matters: Keep the feedback components ($R_f$ and $C_f$) as physically close to the op-amp pins as possible. Long breadboard jumper wires act as inductors and antennas, inviting EMI and phase-shift oscillations. For permanent builds, transition to a perfboard or PCB with a solid ground plane (see Texas Instruments TL072 Datasheet for recommended layout practices).

By treating the op-amp not as an ideal math block, but as a physical semiconductor with parasitic limitations, you can build integrators and differentiators that perform exactly as the calculus dictates. For further reading on semiconductor theory and practical circuit implementations, the All About Circuits Semiconductor Textbook remains an excellent open-source reference for deep-diving into operational amplifier internals.