An op amp integrator outputs a voltage proportional to the time integral of its input signal (using a capacitor in the feedback path), while a differentiator outputs a voltage proportional to the rate of change of the input (using a capacitor on the input path). If you are building these on the bench today, skip the ancient LM741. Your safe default part numbers are the TL072 (for dual-supply, low-noise audio/signal work), the LM358 (for single-supply, low-cost general purpose), and the OPA2134 (for precision, low-offset DC integration). Assuming a standard ±12V dual supply and 25°C ambient, the circuits below will work on the first try without rail-locking.

Safe Default Op-Amps and Biasing Strategy

Selecting the right IC prevents the two most common bench failures: slew-rate limiting (where the output can't change fast enough to track the math) and input bias current drift (which charges the integrator capacitor and locks the output to the rail). Here are the exact specifications for the most reliable defaults.

Table 1: Op-Amp IC Selection for Reactive Circuits
Part Number Supply Range Slew Rate Input Bias Current Typical Cost (2026) Best Application
TL072 ±5V to ±18V 13 V/µs 5 pA $0.85 Audio integrators, active filters
LM358 3V to 32V (Single) 0.3 V/µs 20 nA $0.25 Single-supply slow ramps, PID loops
OPA2134 ±2.5V to ±18V 20 V/µs 5 pA $4.50 Precision DC integration, low drift
MCP6002 1.8V to 6V (Single) 0.6 V/µs 1 pA $0.60 Battery-powered 3.3V micro-interfacing
Biasing for Single vs. Dual Supply: If you use a dual supply (e.g., ±12V), tie the non-inverting input (Pin 3) directly to system ground (0V). If you are forced to use a single supply (e.g., +12V and GND), you must create a "virtual ground" at Vcc/2 (6V). Use a 10kΩ/10kΩ voltage divider from Vcc to GND, buffer it with a unity-gain op-amp, and tie Pin 3 to that 6V reference. Otherwise, your AC signal will clip against the 0V rail.

The Practical Integrator: Circuit, Values, and Operation

A textbook integrator uses a single resistor on the input and a single capacitor in the feedback loop. In reality, a pure integrator will slowly integrate the op-amp's own input offset voltage until the output slams into the positive or negative supply rail. To fix this, we add a high-value feedback resistor in parallel with the capacitor to provide DC stabilization.

Standard DIP-8 Pinout Mapping

For standard dual op-amps (TL072, LM358, OPA2134) in a DIP-8 or SOIC-8 package, wire the first half of the IC as follows:

  • Pin 1 (Output A): Circuit output (Vout)
  • Pin 2 (Inverting Input A): Virtual ground summing node (connects to R_in and C_f)
  • Pin 3 (Non-Inverting Input A): Bias reference (GND for dual supply, Vcc/2 for single)
  • Pin 4 (V-): Negative supply rail (e.g., -12V or GND)
  • Pin 5 (Non-Inverting Input B): Unused (tie to V- or Vcc/2)
  • Pin 6 (Inverting Input B): Unused (tie to Output B)
  • Pin 7 (Output B): Unused
  • Pin 8 (V+): Positive supply rail (e.g., +12V)

Complete Application Circuit (±12V Supply)

Use these exact component values for a 1kHz square-to-triangle wave converter:

  • R_in (Input Resistor): 10 kΩ (Sets input impedance and base integration current)
  • C_f (Feedback Capacitor): 100 nF (Sets the integration time constant, τ = 1ms)
  • R_f (Feedback Resistor): 1 MΩ (Provides DC feedback; limits low-frequency gain to -100 to prevent rail drift. Rule of thumb: R_f ≥ 10 × R_in)
  • C_in (Input Coupling Cap): 1 µF (Optional, blocks external DC offsets from the source)
Capacitor Selection Warning: Avoid X7R or Y5V ceramic capacitors for C_f. They suffer from dielectric absorption—a phenomenon where the capacitor's dielectric material slowly releases stored charge after being discharged, causing a "memory" effect that introduces severe non-linearity in integration ramps. Always use C0G/NP0 ceramics or polypropylene film capacitors for the feedback path.

Operation Regions and Typical Values

Understanding how the op-amp behaves across its operating regions is critical for debugging. The table below assumes a ±12V supply and a 1V peak input signal.

Table 2: Integrator Operation Regions
Operating Mode Vout State Differential Input (V+ - V-) Feedback Current Path
Linear (Active Integration) -10V to +10V (Ramping) ≈ 0V (Virtual Short) Current flows primarily through C_f (I = C × dV/dt)
Positive Saturation +10.5V (Locked High) > 0V (V- drops below V+) Current diverts through R_f; C_f is fully charged
Negative Saturation -10.5V (Locked Low) < 0V (V- rises above V+) Current diverts through R_f; C_f is fully charged
Slew-Rate Limited Linear but distorted > 2mV (Virtual short breaks) Op-amp internal current limit caps C_f charge rate

The Practical Differentiator: Taming High-Frequency Noise

A differentiator is inherently unstable at high frequencies. Because capacitive reactance drops as frequency rises (Xc = 1 / 2πfC), a pure differentiator will amplify high-frequency RF noise and op-amp internal noise until the output saturates. Furthermore, the feedback capacitor in an integrator provides a 90° phase lag that promotes stability, whereas the input capacitor in a differentiator introduces a 90° phase lead, pushing the circuit toward high-frequency oscillation.

To build a usable differentiator, we must limit the high-frequency gain and roll off the response above our signal bandwidth.

Complete Application Circuit (Practical Differentiator)

Use these values to differentiate a 100Hz to 1kHz triangle wave into a square wave:

  • C_in (Input Capacitor): 100 nF (Passes the AC derivative signal)
  • R_in (Series Input Resistor): 100 Ω (Limits high-frequency gain to a maximum of -R_f / R_in. Prevents RF noise amplification)
  • R_f (Feedback Resistor): 10 kΩ (Sets the mid-band differentiation gain)
  • C_f (Parallel Feedback Capacitor): 100 pF (Rolls off high-frequency gain above ~160 kHz, ensuring phase margin stability)

For a deep dive into the transfer functions and Bode plots of these modified topologies, the All About Circuits semiconductor textbook provides excellent mathematical derivations. For component-level error analysis, refer to the Texas Instruments Op-Amp Learning Center.

Failure Modes and Multimeter Testing

When an integrator or differentiator fails on the bench, the output is almost always stuck at the positive or negative rail. Here is how to systematically diagnose the fault using a standard digital multimeter (DMM).

Common Failure Mechanisms

  1. Integrator Drift (Output Locked at Rail): The input offset voltage or input bias current has slowly charged C_f. If R_f is missing or too large, the op-amp has no DC feedback path to correct this, and it saturates.
  2. Differentiator Oscillation (Output is a fuzzy band on the scope): R_in is too small or C_f is missing, allowing high-frequency noise to cause parasitic oscillation. The DMM will read an erratic DC voltage or zero (if the oscillation is symmetric and the DMM averages it).
  3. Capacitor Leakage: Electrolytic or poor-quality ceramic capacitors leak DC current, acting like a massive resistor in parallel with C_f, ruining the integration time constant.
  4. IC Latch-up: If the input signal exceeded the supply rails (violating the absolute maximum ratings), the internal parasitic SCRs may have triggered, shorting V+ to V- internally. The IC will draw massive current and overheat.

Step-by-Step Multimeter Troubleshooting

Follow this exact sequence to isolate the fault without desoldering components unnecessarily.

  1. Verify Power Rails (DC Voltage Mode): Power on the circuit. Place the black probe on system ground and the red probe on Pin 8 (V+). Read should be +12V (±0.2V). Move red to Pin 4 (V-). Read should be -12V. If V+ is pulled low, the IC is likely latched or shorted; power off immediately.
  2. Check the Virtual Ground (DC Voltage Mode): Measure Pin 3 (Non-inverting input). For a dual supply, it must read exactly 0.00V. For a single supply, it must read exactly Vcc/2. If this pin is floating or at the wrong voltage, the op-amp will drive the output to the rail.
  3. Check the Summing Node (DC Voltage Mode): Measure Pin 2 (Inverting input). Due to negative feedback, this pin must be within 2mV of the voltage on Pin 3. If Pin 2 is more than 50mV away from Pin 3 while the output is not railed, the op-amp's internal input stage is blown.
  4. Test Feedback Continuity (Resistance Mode - POWER OFF): Disconnect power. Discharge C_f by briefly shorting Pin 1 to Pin 2 with a 1kΩ resistor. Set DMM to continuity/ohms. Measure across R_f (Pin 1 to Pin 2). It should read the exact resistor value (e.g., 1 MΩ). If it reads open (OL), your DC stabilization is gone, guaranteeing integrator drift.
  5. Isolate Capacitor Leakage (Resistance Mode - POWER OFF): If the circuit integrates too fast or drifts rapidly, desolder one leg of C_f. Measure resistance across the capacitor. A healthy film/ceramic cap will read OL (infinite). If it reads anything under 10 MΩ, the capacitor is leaky and must be replaced.
Bench Trick for Stubborn Integrators: If your integrator output is stuck at the rail and you've verified the passive components are good, inject a brief opposite-polarity DC voltage into the input to manually "un-charge" the feedback capacitor. Alternatively, wire a momentary pushbutton switch in parallel with C_f to act as a manual "reset" button, discharging the cap and pulling the output back to 0V on demand.