To step down a 5V logic signal to a safe 3.3V level for an ESP32 GPIO or ADC pin using a standard Ohm's law circuit diagram (a passive voltage divider), use a 1.0 kΩ resistor for R1 (series) and a 2.0 kΩ resistor for R2 (shunt). This specific E24-series pairing yields exactly 3.33V, limits parasitic current draw to 1.67 mA, and keeps the Thevenin source impedance well below the 10 kΩ threshold required for accurate ESP32 ADC sampling.
The Core Topology: Node Labels and the Math
A voltage divider is the most practical application of Kirchhoff's Voltage Law (KVL) and Ohm's Law in a single schematic. Unlike a simple series resistor used for current limiting, a divider creates a predictable intermediate voltage reference. We define the topology across three distinct nodes:
- Node A ($V_{in}$): The 5V source input (e.g., from an Arduino Uno or 5V sensor).
- Node B ($V_{out}$): The intermediate tap point connecting R1 and R2, routed to the ESP32 pin.
- Node C ($GND$): The 0V common ground reference shared by both the 5V source and the ESP32.
Current flows from Node A through R1 to Node B, then through R2 to Node C. Because the ESP32 GPIO pin draws negligible input leakage current (typically < 1 µA), we treat Node B as an open circuit for the baseline calculation. The governing Ohm's law equations are:
$I_{total} = \frac{V_{in}}{R1 + R2}$
$V_{out} = V_{in} \times \left( \frac{R2}{R1 + R2} \right)$
Design Walkthrough: Sizing R1 and R2 for an ESP32
Let's walk through picking real, off-the-shelf components to interface a 5V digital output to an ESP32-WROOM-32 analog-to-digital converter (ADC) pin. The Espressif ESP32 Datasheet specifies an absolute maximum GPIO voltage of 3.6V, and recommends a source impedance of less than 10 kΩ to allow the internal sampling capacitor to charge fully during the SAR ADC conversion window.
Step 1: Define the target ratio.
We need 3.3V from a 5.0V source. The ratio is $3.3 / 5.0 = 0.66$.
Step 2: Select standard E24 (5% tolerance) values.
If we pick $R2 = 2.0\text{ k}\Omega$, we can solve for R1:
$0.66 = \frac{2000}{R1 + 2000}$
$R1 \approx 1030\text{ }\Omega$
The closest standard E24 value is 1.0 kΩ.
Step 3: Verify the actual output and power dissipation.
With $R1 = 1.0\text{ k}\Omega$ and $R2 = 2.0\text{ k}\Omega$:
$V_{out} = 5.0 \times \left( \frac{2000}{1000 + 2000} \right) = 3.33\text{ V}$. (Safe, well under the 3.6V absolute max).
Total current draw: $I = \frac{5.0\text{ V}}{3000\text{ }\Omega} = 1.67\text{ mA}$.
Power dissipated in R1: $P = I^2 \times R1 = (0.00167)^2 \times 1000 = 2.78\text{ mW}$. Standard 1/4W (250 mW) through-hole or 0603 SMD resistors are more than adequate.
Step 4: Check the Thevenin source impedance.
The ESP32 ADC 'sees' the parallel equivalent of R1 and R2.
$R_{th} = \frac{R1 \times R2}{R1 + R2} = \frac{1000 \times 2000}{3000} = 667\text{ }\Omega$.
Since 667 Ω is vastly lower than the 10 kΩ maximum recommended by Espressif, this divider will not introduce sampling non-linearity or droop during the ADC acquisition phase.
Behavior Table and Failure Modes at the Extremes
Passive dividers are robust, but a single component fault can destroy your microcontroller. Understanding what breaks at the extremes is critical for deciding whether to add protection diodes or switch to an active topology. As noted in Analog Devices' guide on voltage dividers, open-circuit failures in the shunt leg are the most catastrophic.
| Component | Fault Condition | Resulting $V_{out}$ at Node B | Consequence to ESP32 |
|---|---|---|---|
| R1 (1k Series) | Short Circuit (0 Ω) | 5.0V | Catastrophic. Exceeds 3.6V max. GPIO silicon junction breaks down, permanently frying the pin or the entire chip. |
| R1 (1k Series) | Open Circuit (∞ Ω) | 0V (Floating/Pulled low) | Benign. ESP32 reads 0V. Signal is lost, but no physical damage occurs. |
| R2 (2k Shunt) | Short Circuit (0 Ω) | 0V | Benign. Node B is hard-tied to ground. ESP32 reads 0V. R1 dissipates 25mW (safe). |
| R2 (2k Shunt) | Open Circuit (∞ Ω) | 5.0V (via R1) | Catastrophic. The divider action ceases. 5V is applied directly through R1 to the ESP32 pin, destroying the input protection diodes. |
Decision Tree: Voltage Divider vs. Active Level Shifters
Why use a passive Ohm's law circuit diagram over a dedicated logic level shifter IC? Dividers cost pennies, introduce zero propagation delay, and require no secondary power rail. However, they fail at high frequencies due to parasitic capacitance and cannot drive bidirectional buses. Use the decision matrix below to lock in your topology.
| Signal Characteristic | Topology Choice | Concrete Part / Value Pick |
|---|---|---|
| Unidirectional, Low Speed (< 10 kHz) GPIO or ADC | Passive Resistor Divider | R1: 1.0 kΩ, R2: 2.0 kΩ (Default pick for this article) |
| Unidirectional, High Speed (> 100 kHz) SPI or PWM | Active MOSFET-based Shifter | TXB0104 (Texas Instruments auto-direction translator) |
| Bidirectional, Open-Drain (I2C / 1-Wire) | I2C-specific Level Shifter | PCA9306 (NXP) or discrete BSS138 MOSFET pair with pull-ups |
| High Voltage (> 12V) to 3.3V Logic | Optocoupler or Zener Clamp | LTV-817 Optocoupler (Provides galvanic isolation) |
The Verdict: If you are reading a slow analog sensor (like a 5V photoresistor or potentiometer) or triggering a simple interrupt, terminate your design with the 1.0 kΩ / 2.0 kΩ passive divider. Do not over-engineer with a TXB0104 unless your oscilloscope shows edge rounding caused by the 667 Ω source impedance interacting with trace capacitance.
Step-by-Step Breadboard Verification
Do not connect your ESP32 until you have verified the divider behavior under both unloaded and loaded conditions. Follow this exact sequence to avoid bricking your dev board.
- De-energize the board. Ensure the 5V source and the ESP32 USB are both unplugged.
- Place the resistors. Insert the 1.0 kΩ (brown-black-red-gold) resistor spanning the center trench. Insert the 2.0 kΩ (red-black-red-gold) resistor directly below it, sharing the common Node B row.
- Verify continuity. Set your multimeter to continuity mode. Probe the top leg of R1 and the bottom leg of R2. You should read approximately 3.0 kΩ (or a dead short beep if your meter lacks high-resistance continuity). Probe Node B to GND; you should read 2.0 kΩ.
- Power the source only. Plug in the 5V source. Leave the ESP32 disconnected from Node B.
- Measure open-circuit voltage. Set the DMM to DC Volts. Place the black probe on the GND rail and the red probe on Node B. You must read between 3.25V and 3.40V (accounting for 5% resistor tolerance and a 4.9V-5.1V USB rail variance). If you read 5V, R2 is not making contact.
- Connect the load and verify droop. Power down, connect Node B to the ESP32 GPIO, and power everything up. Measure Node B again while the ESP32 is actively sampling. The voltage should not drop more than 20 mV from your open-circuit reading. A massive drop indicates your GPIO pin is accidentally configured as an OUTPUT pulling low, rather than an INPUT.
