The N-channel MOSFET symbol is defined by a vertical channel line intersected by three terminals (Gate, Drain, Source), with an outward-pointing arrow on the Source terminal indicating conventional current flow direction. In modern schematics, you will encounter either the IEEE/ANSI standard (dominant in the US) or the IEC 60617 standard (dominant in Europe and international datasheets). Below is the complete reference for interpreting these symbols, mapping physical pinouts, and selecting the exact part number for your circuit.

N-Channel MOSFET Symbol & Pinout Reference Table

This table maps the schematic symbols to their physical package pinouts. Always verify the specific manufacturer's datasheet, as SOT-23 pinouts can vary between vendors.

Variant IEEE/ANSI Symbol (US Standard) IEC 60617 Symbol (Intl Standard) TO-220 Pinout (Left to Right, Tab=Drain) SOT-23 Pinout (Top View, Standard)
N-Channel Enhancement Vertical line broken into 3 segments (channel). Gate is isolated. Arrow on Source points outward. Rectangular box. Gate on left, Drain top right, Source bottom right. 'N' and diode symbol inside box. 1: Gate, 2: Drain, 3: Source 1: Gate, 2: Source, 3: Drain (GSD)
N-Channel Depletion Vertical line is solid (continuous channel). Gate is isolated. Arrow on Source points outward. Rectangular box. Solid vertical line inside the box indicating a normally-on channel. 1: Gate, 2: Drain, 3: Source 1: Gate, 2: Source, 3: Drain (GSD)
P-Channel Enhancement (For Contrast) Vertical line broken into 3 segments. Arrow on Source points inward toward the channel. Rectangular box. 'P' and diode symbol inside box. Arrow on Source points inward. 1: Gate, 2: Drain, 3: Source 1: Gate, 2: Source, 3: Drain (GSD)

Rows People Get Wrong: Symbol & Pinout Traps

Even experienced makers misinterpret specific nuances of the MOSFET schematic symbols and physical packages. Watch out for these three common errors:

  • The Arrow Direction Mnemonic: The arrow on the Source terminal defines the channel type. For N-channel, the arrow points out (Not pointing in). For P-channel, it points in (Pointing in). Confusing these will result in a high-side switch that never turns off, or a low-side switch that shorts your power rail.
  • The Missing Body Diode: Most basic IEEE schematic symbols omit the intrinsic body diode to reduce clutter. However, every physical power MOSFET has a parasitic P-N junction between the Source and Drain. In an N-channel MOSFET, this diode points from Source to Drain (cathode at Drain). If you use an N-channel MOSFET for high-side switching or battery reverse-polarity protection without accounting for this diode, current will flow through the body diode even when the Gate is at 0V.
  • The SOT-23 Pinout Gamble: While the TO-220 package is universally pinned as Gate-Drain-Source (with the tab tied to Drain), the SOT-23 surface-mount package is not strictly standardized. Most modern vendors (like Nexperia and Diodes Inc.) use Gate-Source-Drain (GSD), but older or specific RF MOSFETs may use Gate-Drain-Source (GDS). Never assume SOT-23 pinouts without checking the specific manufacturer's datasheet.

IEEE vs IEC: Which Standard Applies to Your Region?

The visual representation of the N-channel MOSFET depends on the drafting standard used by your CAD software or the origin of the datasheet you are reading.

Rule of Thumb: If you are designing in the US or using legacy Altium/OrCAD libraries, you will default to the IEEE/ANSI 315 standard (the distinct cross-and-arrow symbol). If you are reading a datasheet from a European manufacturer like Infineon or STMicroelectronics, or using IEC-compliant CAD settings, you will see the IEC 60617 standard (the rectangular box with internal notations).

The IEC box symbol is highly advantageous for complex ICs because it clearly delineates the internal body diode and the channel type ('N' or 'P') inside the boundary, reducing ambiguity in dense power supply schematics. However, the IEEE symbol remains the undisputed standard for board-level debugging and quick whiteboard explanations because the isolated Gate line and directional arrow are instantly recognizable at a glance.

Decision Tree: Picking the Right N-Channel Part

Do not default to the legendary IRF520 for every project; it is an older, high-threshold part that performs poorly on 3.3V or 5V logic. Use this decision matrix to terminate your selection process with a concrete, optimal part number.

Application Scenario Required VGS(th) & RDS(on) Concrete Part Pick (TO-220 / SOT-23)
Switching 12V/24V Loads from 5V Arduino/ESP32 VGS(th) < 2.5V (Logic Level). Low RDS(on) to prevent heat. IRLB8721 (TO-220) or IRLZ44N (TO-220). Both fully enhance at VGS = 4.5V.
Switching 12V/24V Loads from 3.3V Raspberry Pi/ESP32 VGS(th) < 1.5V (Ultra-Low Threshold). PSMN2R0-30PL (TO-220) or Si2302 (SOT-23). Guaranteed RDS(on) at VGS = 2.5V.
I2C Level Shifting (3.3V to 5V) Low capacitance, small signal, VGS(th) ~ 1.0V. BSS138 (SOT-23). The industry standard for bidirectional I2C translation.
High Current DC-DC Buck Converter Sync FET Extremely low RDS(on) (< 5mΩ), fast switching, high gate charge tolerance. IRF3205 (TO-220) or CSD17571Q5A (SON 5x6). Optimize for gate driver strength.

For high-volume production, always cross-reference these picks with the Infineon Power MOSFET Portfolio or equivalent vendor parametric searches to check current silicon availability and pricing.

Safe Interpretation of Unmarked or Faded Packages

When salvaging components or dealing with a TO-220 MOSFET where the laser etching has been burned off by excessive heat or painted over, you cannot rely on visual pinout memory. You must electrically verify the N-channel architecture and map the pins using a digital multimeter (DMM).

Safety First: Ensure the MOSFET is completely removed from the circuit before testing. In-circuit testing will yield false readings due to parallel component paths. Discharge the Gate-to-Source capacitance by briefly shorting all three pins together with a resistor or jumper wire before testing.
  1. Set your DMM to Diode Test mode.
  2. Identify the Body Diode: Place the Red probe on the middle pin (Drain) and the Black probe on the right pin (Source). The meter should read 'OL' (Open Loop). Swap the probes: Red on right pin, Black on middle pin. You should read a voltage drop between 0.4V and 0.6V. This confirms the middle pin is Drain, the right pin is Source, and the intrinsic diode is oriented correctly for an N-channel device.
  3. Verify the Gate: Test the left pin against both the Drain and Source in both polarities. The meter must read 'OL' in all four combinations. The Gate is physically insulated by a silicon dioxide layer; any continuity reading means the MOSFET is blown and the gate oxide has ruptured.
  4. Confirm Enhancement Mode: While keeping the Black probe on the Source, momentarily touch the Red probe to the Gate to charge the gate capacitance. Move the Red probe back to the Drain. The meter should now read a low voltage drop (or near 0V) as the MOSFET turns on. Short all pins again to discharge and turn it off.

By relying on the physical properties of the parasitic body diode and the insulated gate, you can confidently identify and bin unmarked N-channel MOSFETs without guessing based on faded silkscreen.