The multiplexer (MUX) symbol on a schematic dictates how digital or analog signals are routed from multiple inputs to a single output. If you are reading a modern US commercial schematic, expect the ANSI/IEEE rectangular symbol with dependency notation. If you are reading older military, aerospace, or hobbyist diagrams, expect the trapezoidal symbol. For European IEC documentation, look for the IEC 60617 rectangular variant. Below is the complete reference to decode these symbols, map their pinouts, and select the right IC for your bench.

Multiplexer Symbol Reference Table

Symbol Style Visual Shape Primary Standard Where You Will See It Key Internal Notation
Trapezoidal (Legacy/MIL) Trapezoid; wide edge is inputs, narrow edge is output MIL-STD-806 / Legacy ANSI Older US military/aerospace prints, hobbyist tutorials, university textbooks Logic gates drawn explicitly inside the shape; select lines enter the side or bottom.
Rectangular (IEEE) Strict rectangle with qualifying symbols on left/top/bottom ANSI/IEEE Std 91-1984 Modern US commercial schematics, TI/NXP datasheets, professional EDA tools Dependency notation (e.g., G for AND/Enable, M for MUX mode selection).
Rectangular (IEC) Rectangle, similar to IEEE but with IEC-specific logic markers IEC 60617 European industrial prints, IEC-compliant automation schematics Uses standard IEC logic qualifiers; often omits complex dependency chains for readability.
Analog MUX (Switch) Rectangle with a diagonal switch blade or SPST/SPDT switch symbols inside IEEE 91 / IEC 60617 Mixed-signal designs, sensor routing, audio matrices Bidirectional I/O arrows; RON (on-resistance) sometimes noted in text blocks.

Pinout Mapping & Rows People Get Wrong

When translating a schematic symbol to a physical DIP or SOIC package, engineers frequently miswire three specific pin groups. These mistakes usually result in a floating output, a permanently disabled chip, or reversed channel selection.

Warning: Active-Low Enable (/E or /STROBE)
The most common bench mistake is wiring the Enable pin to VCC (Logic HIGH) because it is labeled 'Enable'. On 90% of standard digital muxes (like the 74HC151), the enable pin is active-LOW (indicated by a bubble on the symbol or a slash in the pin name, e.g., /E or /G). If you tie this to VCC, the mux output goes high-impedance (Z) or forced LOW, regardless of your select lines. Always tie unused active-low enables directly to GND.

The 'Rows People Get Wrong' Notes

  • Select Line Bit-Ordering (A, B, C vs S0, S1, S2): In the 74HC151 (8-to-1 digital), the select pins are labeled A, B, and C. A is the Least Significant Bit (LSB) and C is the Most Significant Bit (MSB). If you want to select Input 5 (binary 101), you must set C=HIGH, B=LOW, A=HIGH. Wiring A as the MSB will select Input 3 instead.
  • Complementary Outputs (Y and /W): Digital muxes often provide both a true output (Y) and a complemented output (/W or /Y). The IEEE symbol shows a bubble on the /W pin. Do not use /W to drive an active-high load unless you specifically need the inverted logic; it introduces an extra propagation delay (typically 2-4ns in 74HC logic) compared to the Y pin.
  • Analog vs. Digital Common Pins: On a digital mux (74HC151), the common pin is strictly an output. On an analog mux (CD4051), the common pin (labeled COM or X) is bidirectional. The symbol for an analog mux will show double-headed arrows on the I/O lines. Treating an analog mux common pin as a unidirectional output without a pull-down resistor can lead to floating node noise when the channel switches.

Regional Standards: IEEE vs IEC vs MIL

The symbol you encounter depends heavily on the region and the age of the documentation. Understanding the standard prevents misinterpretation of internal logic.

ANSI/IEEE Std 91-1984 (United States / Modern Commercial)

The IEEE standard uses dependency notation to keep the rectangle clean. Instead of drawing internal AND/OR gates, it uses letters and numbers. For example, an 8-to-1 mux will have select inputs labeled M0,2 (meaning these pins control a mode from 0 to 7). The data inputs will be labeled 0,7. The internal logic implies that when the select lines equal 3, data input 3 is routed to the output. If you see a G prefix (e.g., G0,7), it means an AND-dependency: the enable pin must be active for inputs 0 through 7 to pass.

IEC 60617 (Europe / International Industrial)

The IEC standard also uses a rectangular outline but often simplifies the dependency notation for complex ICs, relying more on standard logic block qualifiers. In European automation schematics, you will frequently see the MUX represented as a simple function block labeled 'MUX' with explicit binary weightings (1, 2, 4) written next to the select pins rather than the abstract M dependency notation.

MIL-STD-806 (Legacy / Aerospace)

The trapezoidal shape is a holdover from older military standards. It is highly intuitive because it physically resembles a funnel. While no longer used for new commercial silicon datasheets, it remains the default in many university logic design courses and older avionics maintenance manuals. If you see a trapezoid, assume traditional Boolean logic gates are implied inside, rather than IEEE dependency notation.

Bench Guide: Identifying a MUX with Faded Markings

When repairing legacy equipment or reverse-engineering a PCB where the silkscreen is faded or the IC top-marking is laser-ablated, you can identify a multiplexer using a multimeter and logical deduction.

Pro Tip: Use your multimeter's continuity mode (with the board completely de-energized and capacitors discharged) to map the pinout. Never probe logic levels on a powered board until you have confirmed VCC and GND pins to avoid shorting the rail.
  1. Locate VCC and GND: Check the datasheet for the suspected IC family (e.g., 74xx series usually has GND on Pin 7 and VCC on Pin 14 for 14-pin DIPs; 16-pin DIPs like the 74HC151 use Pin 8 for GND and Pin 16 for VCC). Verify continuity to the board's ground plane and power rails.
  2. Find the Common Pin: Trace the output track. A MUX will have a single pin that routes to the next logic stage or ADC. On the physical IC, this is typically located near the center or opposite the select lines.
  3. Identify the Select Lines: Look for a cluster of 2, 3, or 4 pins that route directly to a microcontroller GPIO bank or a binary counter. These are your select lines (S0, S1, S2).
  4. Check for the Enable Pin: If the IC has an extra pin that is hardwired directly to the ground plane via a via, it is almost certainly an active-low Enable pin that the designer tied LOW to keep the MUX permanently active.
  5. Digital vs. Analog Check: If the input pins route to physical sensors, potentiometers, or audio jacks, you are looking at an analog MUX (like a 4051). If they route to other logic ICs, it is a digital MUX.

Decision Tree: Which MUX IC to Specify

Do not default to 'it depends' when selecting a multiplexer for a new design. Use this decision path to lock in the exact part number based on your signal type and channel count.

Signal Type & Requirement Decision Condition Concrete IC Pick (DIP/SOIC) Key Spec to Verify
Digital Logic (5V / 3.3V) Need to route 8 digital lines to 1 output (e.g., reading 8 switches to 1 MCU pin) 74HC151 (or 74HCT151 for 5V-to-3.3V translation) Propagation delay (~15ns); ensure /E is tied to GND.
Digital Logic (Multiple 2-to-1) Need to switch between two 4-bit data buses (e.g., selecting between two 4-bit ADCs) 74HC157 (Quad 2-line to 1-line) Shared select pin for all four channels; non-inverting output.
Analog Signals (Sensors/Audio) Need to route up to 8 analog voltages (0-5V) to a single ADC input CD4051B (or 74HC4051 for faster switching) On-resistance (RON ~120Ω); account for voltage drop if sourcing high current.
Analog Signals (High Channel Count) Need to scan a 4x4 keypad matrix or route 16 analog sensors to 1 ADC 74HC4067 (16-channel analog) Requires 4 select lines (S0-S3); break-before-make time (~10ns) prevents channel crosstalk.

For authoritative pinout verification and electrical characteristics, always cross-reference your final selection with the manufacturer's datasheet, such as the TI SN74HC151 Datasheet for digital routing or the TI CD4051B Datasheet for analog signal switching. Matching the correct schematic symbol to the physical silicon ensures your select lines map correctly and your enable pins are biased for proper operation on the first board spin.