The arrow on a MOSFET symbol always indicates the PN junction between the body (bulk) and the source. If the arrow points inward toward the channel line, it is an N-channel MOSFET. If it points outward, it is a P-channel. The channel line itself tells you the default state: a broken line means enhancement mode (normally off, requires gate voltage to conduct), while a solid line means depletion mode (normally on, requires gate voltage to turn off). Keep this rule in mind as you read the reference table below.
The Complete MOSFET Symbol Reference Table
This table covers the standard discrete power and signal MOSFET symbols you will encounter on schematics. We have mapped each symbol to its physical behavior and a common bench-stock part number.
| Symbol Name | Visual Identifiers | Default State | Conduction Rule | Bench Part Example |
|---|---|---|---|---|
| N-Channel Enhancement | Arrow IN on source. Broken channel line. Gate separated by gap. | Normally OFF | Turns ON when V_GS > V_th (positive gate voltage). | IRLZ44N (TO-220) |
| P-Channel Enhancement | Arrow OUT on source. Broken channel line. Gate separated by gap. | Normally OFF | Turns ON when V_GS < -V_th (negative gate voltage relative to source). | IRF9540N (TO-220) |
| N-Channel Depletion | Arrow IN on source. Solid channel line. Gate separated by gap. | Normally ON | Turns OFF when V_GS is sufficiently negative. | LND150 (TO-92) |
| P-Channel Depletion | Arrow OUT on source. Solid channel line. Gate separated by gap. | Normally ON | Turns OFF when V_GS is sufficiently positive. | LND715 (TO-92) |
| 4-Terminal (IC Style) | Arrow on bulk/body pin, not source. Source and bulk are separate. | Depends on type | Used in IC design; bulk is usually tied to the lowest potential (GND). | CD4007 internal FETs |
IEEE vs. IEC: Regional Standard Variants
Schematic capture software defaults to different symbol libraries based on your region and the standard you select. Misreading a European schematic when you are used to American standards is a common source of wiring errors.
| Feature | IEEE 315 (US / Traditional) | IEC 60617 (EU / Rectangular) |
|---|---|---|
| Overall Shape | Cross and lines. The gate, drain, and source intersect a central vertical channel line. | Rectangular envelope. The semiconductor body is drawn as a box. |
| Gate Insulation | Drawn as a distinct physical gap between the gate wire and the channel line. | Drawn as a line parallel to the box edge, sometimes with a small gap or just a parallel line. |
| Arrow Placement d> | Arrow is on the source leg (or bulk leg in 4-terminal), pointing to/from the channel. | Arrow is often placed inside or on the edge of the rectangular box to denote N/P type. |
| Body Diode | Frequently drawn explicitly as a parallel diode between drain and source in power FETs. | Rarely drawn explicitly; assumed to be intrinsic to the physical component. |
The "Rows People Get Wrong" Notes
When troubleshooting or designing, engineers and hobbyists consistently misinterpret three specific aspects of MOSFET symbols.
1. Confusing JFETs with MOSFETs
Look closely at the gate connection. A MOSFET symbol always shows the gate electrically isolated from the channel (a visible gap or parallel line). A JFET (Junction Field Effect Transistor) symbol shows the gate wire physically touching the channel line, often with an arrow. If you apply a positive voltage to the gate of an N-channel JFET expecting it to act like a MOSFET, you will forward-bias the gate-channel PN junction, drawing massive current and likely destroying the part or your driver circuit.
2. The Missing Body Diode Trap
In Row 1 and Row 2 of our reference table, we noted that the body diode is sometimes omitted in schematic symbols to save space. If you are designing a low-side switch for an inductive load (like a relay coil or motor) and the symbol lacks a diode, you must add an external flyback diode or rely on the MOSFET's intrinsic body diode. Relying on the intrinsic diode for repetitive high-energy avalanche clamping will eventually degrade the silicon and cause a short-circuit failure. Always check the datasheet's "Single Pulse Avalanche Energy" (E_AS) rating if you plan to let the body diode handle inductive kickback.
3. Enhancement vs. Depletion Mode Mix-ups
Row 3 and Row 4 (Depletion mode) feature a solid channel line, meaning they are normally ON. Hobbyists often grab a depletion-mode FET like the LND150 thinking it's a standard switch, wire it into a high-side power path, and wonder why their circuit is live even when the microcontroller GPIO is low. Remember: broken line = normally off (enhancement); solid line = normally on (depletion).
Safe Interpretation: Faded Markings and Ambiguous Schematics
What happens when you are repairing a board, the physical MOSFET markings are burned off, and the schematic is ambiguous or missing? You must safely identify the channel type and verify the gate oxide integrity using a digital multimeter (DMM).
Set your DMM to Diode Test mode and follow this sequence:
- Find the Body Diode (Identifies N vs P): Place the red probe on the Source and the black probe on the Drain. If you read a forward voltage drop of 0.4V to 0.7V, it is an N-channel MOSFET. Reverse the probes (black on Source, red on Drain); if you read 0.4V to 0.7V, it is a P-channel. The opposite direction should read "OL" (Open Loop).
- Check Gate Oxide Integrity: Measure resistance between the Gate and Source, then Gate and Drain. Both must read "OL" in both probe directions. If you read any finite resistance (especially less than 1 MΩ), the gate oxide is punctured. The part is dead; discard it.
- Verify Enhancement Action: For an N-channel FET, hold the black probe on the Source. Briefly touch the red probe to the Gate to charge it (turning it on), then move the red probe to the Drain. The DMM should now read near 0.00V (shorted) instead of the 0.5V diode drop, proving the channel enhances. Touch a finger across Gate and Source to discharge it; the reading should revert to the diode drop or OL.
For a deeper dive into the semiconductor physics dictating these readings, refer to the ON Semiconductor AN-910 Power MOSFET Basics application note.
Decision Tree: Picking the Right MOSFET for Your Circuit
Stop guessing which symbol translates to which physical part. Use this decision path to terminate your selection process with a concrete, proven part number.
| Circuit Requirement | Symbol Needed | Concrete Part Pick (Bench Stock) |
|---|---|---|
| Low-side switch driven directly by a 5V or 3.3V microcontroller GPIO. | N-Channel Enhancement (Logic Level) | IRLB8721 or IRLZ44N. (Must have V_GS(th) < 2.5V and low R_DS(on) at 4.5V). |
| Low-side switch driven by 10V-12V gate driver IC (e.g., IR2110). | N-Channel Enhancement (Standard Level) | IRF540N or IRF3205. (Cheaper, handles higher current, but requires 10V+ on gate). |
| High-side switch for a 12V or 24V load, no charge pump available. | P-Channel Enhancement | IRF9540N (TO-220) or Si2301 (SOT-23 SMD). (Pull gate to GND to turn on). |
| High-side switch for high-current 48V+ systems (e.g., EV or solar). | N-Channel Enhancement + Charge Pump | IRFB4110 paired with a high-side driver like the MIC4102. (P-FETs at 48V+ have terrible R_DS(on) and are expensive). |
| Normally-on current limiter or solid-state relay default-closed path. | N-Channel or P-Channel Depletion | LND150 (N-ch) or IXTA01N100D (High voltage N-ch depletion). |
By matching the schematic symbol directly to the physical behavior and the correct gate-drive voltage, you eliminate the most common causes of thermal runaway and blown gate drivers. For further reading on matching gate charge to your driver capabilities, consult the All About Circuits MOSFET Technical Guide.
