The MOSFET current formula calculates the drain current ($I_D$) flowing through the semiconductor channel based on the applied gate-source voltage ($V_{GS}$), the device's threshold voltage ($V_{th}$), and the drain-source voltage ($V_{DS}$). In practical bench work, realistic answer magnitudes range from 20 mA for a small-signal 2N7000 switching an LED indicator, up to 120 A continuous for an IRF3205 driving a motor in an e-bike controller. The exact equation you use depends entirely on whether the MOSFET is operating in the linear (triode) region as a voltage-controlled resistor, or in the saturation region as a constant-current source.
The Core MOSFET Current Formula and Symbol Definitions
The Shockley MOSFET equations model the drain current for an enhancement-mode NMOS device. The formulas split into three distinct operating regions: Cutoff, Triode (Linear), and Saturation. Below is the primary mathematical model for the active regions.
Triode (Linear) Region:
$I_D = k_n \left[ (V_{GS} - V_{th})V_{DS} - \frac{V_{DS}^2}{2} \right]$
Saturation Region:
$I_D = \frac{1}{2} k_n (V_{GS} - V_{th})^2 (1 + \lambda V_{DS})$
Note: In basic textbook derivations, the channel-length modulation parameter ($\lambda$) is often assumed to be 0, simplifying the saturation formula to $I_D = \frac{1}{2} k_n (V_{GS} - V_{th})^2$. We will use the simplified form for our primary worked examples, but address $\lambda$ in the edge cases.
| Symbol | Parameter Name | Standard Unit | Typical Discrete Range |
|---|---|---|---|
| $I_D$ | Drain Current | Amperes (A) | 1 mA to 200 A |
| $V_{GS}$ | Gate-to-Source Voltage | Volts (V) | 0 V to 20 V |
| $V_{DS}$ | Drain-to-Source Voltage | Volts (V) | 0 V to 100 V |
| $V_{th}$ | Threshold Voltage | Volts (V) | 0.8 V to 4.0 V (NMOS) |
| $k_n$ | Device Transconductance Parameter ($\mu_n C_{ox} \frac{W}{L}$) | A/V² | 0.001 to 5.0 A/V² |
| $\lambda$ | Channel-Length Modulation Parameter | V⁻¹ | 0.01 to 0.1 V⁻¹ |
Rearranged Forms for Circuit Design
When designing bias networks or constant-current loads, you rarely solve for $I_D$ directly. Instead, you know your target current and need to find the required bias voltage or select a specific MOSFET. Assuming the device is in saturation and ignoring $\lambda$, here are the rearranged forms:
- Solving for $V_{GS}$ (Required Gate Drive): $V_{GS} = \sqrt{\frac{2 I_D}{k_n}} + V_{th}$
- Solving for $V_{th}$ (Verifying Datasheet Limits): $V_{th} = V_{GS} - \sqrt{\frac{2 I_D}{k_n}}$
- Solving for $k_n$ (Selecting a Die Size/Part): $k_n = \frac{2 I_D}{(V_{GS} - V_{th})^2}$
Operating Regions and Real-World Parameters
The formula you apply depends strictly on the relationship between $V_{DS}$ and the overdrive voltage ($V_{OV} = V_{GS} - V_{th}$).
- Cutoff: $V_{GS} < V_{th}$. The channel is pinched off. $I_D = 0$.
- Triode (Linear): $V_{GS} > V_{th}$ AND $V_{DS} < V_{GS} - V_{th}$. The channel is continuous from source to drain. The MOSFET acts like a voltage-controlled resistor.
- Saturation: $V_{GS} > V_{th}$ AND $V_{DS} \ge V_{GS} - V_{th}$. The channel pinches off at the drain end. The MOSFET acts as a constant current source, largely independent of $V_{DS}$.
In university microelectronics, you use the triode formula to calculate current. In real-world power electronics, when a discrete power MOSFET is fully enhanced (e.g., $V_{GS} = 10\text{V}$), $V_{OV}$ is massive compared to the millivolt-level $V_{DS}$. The $V_{DS}^2$ term becomes negligible, and the triode formula collapses into Ohm's Law: $V_{DS} = I_D \times R_{DS(on)}$. Always check your datasheet's $R_{DS(on)}$ vs $V_{GS}$ curves for power switching applications rather than relying on the raw $k_n$ parameter.
| Part Number | Type / Package | $V_{th}$ Range (V) | Max Continuous $I_D$ (A) | Primary Application |
|---|---|---|---|---|
| 2N7000 | N-Channel / TO-92 | 0.8 to 3.0 | 0.2 | Logic level shifting, LED driving |
| Si2302 | N-Channel / SOT-23 | 0.5 to 1.2 | 2.8 | Li-ion battery load switching |
| IRF540N | N-Channel / TO-220 | 2.0 to 4.0 | 33.0 | DC motor control, PWM switching |
| IRF4905 | P-Channel / TO-220 | -2.0 to -4.0 | -74.0 | High-side power rail switching |
Worked Example 1: Linear (Triode) Region Calculation
Problem: An NMOS transistor has a device transconductance parameter $k_n = 4 \text{ mA/V}^2$ and a threshold voltage $V_{th} = 1.5 \text{ V}$. The circuit applies $V_{GS} = 3.5 \text{ V}$ and $V_{DS} = 1.0 \text{ V}$. Calculate the drain current $I_D$.
Step 1: Calculate the Overdrive Voltage ($V_{OV}$)
$V_{OV} = V_{GS} - V_{th}$
$V_{OV} = 3.5\text{ V} - 1.5\text{ V} = 2.0\text{ V}$
Step 2: Determine the Operating Region
Compare $V_{DS}$ to $V_{OV}$:
$V_{DS} = 1.0\text{ V}$
$V_{OV} = 2.0\text{ V}$
Since $V_{DS} < V_{OV}$ ($1.0 < 2.0$), the MOSFET is operating in the Triode (Linear) Region.
Step 3: Apply the Triode Formula with Unit Tracking
$I_D = k_n \left[ (V_{GS} - V_{th})V_{DS} - \frac{V_{DS}^2}{2} \right]$
$I_D = 4 \text{ mA/V}^2 \times \left[ (2.0\text{ V})(1.0\text{ V}) - \frac{(1.0\text{ V})^2}{2} \right]$
$I_D = 4 \text{ mA/V}^2 \times \left[ 2.0\text{ V}^2 - 0.5\text{ V}^2 \right]$
$I_D = 4 \text{ mA/V}^2 \times 1.5\text{ V}^2$
$I_D = 6.0 \text{ mA}$
Worked Example 2: Saturation Region Calculation
Problem: Using the exact same NMOS transistor ($k_n = 4 \text{ mA/V}^2$, $V_{th} = 1.5 \text{ V}$, $V_{GS} = 3.5 \text{ V}$), the drain voltage is increased such that $V_{DS} = 4.0 \text{ V}$. Calculate the new drain current $I_D$.
Step 1: Verify Overdrive Voltage
$V_{OV} = 3.5\text{ V} - 1.5\text{ V} = 2.0\text{ V}$ (unchanged).
Step 2: Determine the Operating Region
Compare $V_{DS}$ to $V_{OV}$:
$V_{DS} = 4.0\text{ V}$
$V_{OV} = 2.0\text{ V}$
Since $V_{DS} > V_{OV}$ ($4.0 > 2.0$), the MOSFET has entered the Saturation Region. The channel is pinched off at the drain.
Step 3: Apply the Saturation Formula
Assuming $\lambda = 0$ for ideal calculation:
$I_D = \frac{1}{2} k_n (V_{GS} - V_{th})^2$
$I_D = 0.5 \times 4 \text{ mA/V}^2 \times (2.0\text{ V})^2$
$I_D = 2 \text{ mA/V}^2 \times 4.0\text{ V}^2$
$I_D = 8.0 \text{ mA}$
Notice that increasing $V_{DS}$ from 1.0 V to 4.0 V only increased the current from 6.0 mA to 8.0 mA. In saturation, the current flattens out and becomes largely independent of the drain voltage, acting as a constant current source.
Common Unit Mistakes and Edge Cases
When moving from textbook problems to actual circuit simulation (like LTspice) or bench debugging, three specific mathematical traps routinely break the MOSFET current formula.
1. The $k_n$ Unit Trap (Microamps vs. Milliamps)
In integrated circuit (IC) design, MOSFETs are microscopic. Datasheets and SPICE models for IC-level transistors often specify the process transconductance parameter ($k_n'$ or $\mu_n C_{ox}$) in $\mu\text{A/V}^2$. However, discrete power MOSFETs operate in the $\text{A/V}^2$ or $\text{mA/V}^2$ range. If you plug a $k_n$ value of $200 \mu\text{A/V}^2$ into the formula but treat it as milliamps, your calculated current will be off by a factor of 1,000. Always convert $k_n$ to base SI units ($\text{A/V}^2$) before calculating, then convert the final $I_D$ back to mA for readability.
2. PMOS Sign Inversions
The formulas above are strictly for NMOS devices. For PMOS transistors, the charge carriers are holes, and the voltage polarities are inverted. The threshold voltage ($V_{th}$) is a negative number (e.g., -2.0 V). To use the standard NMOS formulas for a PMOS device without rewriting the math, use the absolute values of the voltages: replace $V_{GS}$ with $|V_{GS}|$, $V_{th}$ with $|V_{th}|$, and $V_{DS}$ with $|V_{DS}|$. Forgetting to invert the signs will result in calculating a negative overdrive voltage, falsely placing the device in cutoff.
3. Ignoring Temperature Drift on $V_{th}$
The threshold voltage is not a fixed constant; it has a negative temperature coefficient. As the silicon die heats up under load, $V_{th}$ drops (typically by -2 mV/°C to -4 mV/°C). If you design a linear bias circuit that relies on a precise $V_{GS}$ to set a specific $I_D$ in the saturation region, a 50°C rise in junction temperature will drop $V_{th}$ by roughly 0.15 V. Because the saturation formula squares the overdrive voltage $(V_{GS} - V_{th})^2$, this small drop in $V_{th}$ causes a disproportionate, non-linear spike in $I_D$, potentially leading to thermal runaway. This is why practical MOSFET bias networks rely on source-degeneration resistors ($R_S$) to provide negative feedback, rather than relying purely on the raw Shockley equations.
For deeper insights into how these theoretical parameters map to the physical limits of the silicon die, review the Texas Instruments application note on understanding MOSFET data sheets, which bridges the gap between the $k_n$ derivation and the practical $R_{DS(on)}$ and $I_{D(max)}$ limits you see on component distributor pages.
