Mastering MOSFET Current Equations: Worked Examples and Rearranged Forms

If you are designing a switching regulator, sizing an integrated circuit transistor, or just trying to figure out why your discrete MOSFET is overheating, you need to calculate the drain current accurately. The MOSFET current equations (specifically the Shichman-Hodges model) provide the mathematical bridge between your gate voltage and the actual current flowing through the channel. Below, we break down the exact formulas, define every variable, highlight the unit traps that ruin calculations, and walk through step-by-step worked examples.

The Core MOSFET Current Equations (Linear & Saturation)

The behavior of an n-channel enhancement-mode MOSFET is divided into three regions: cutoff, triode (linear), and saturation. Assuming the device is turned on (V_GS > V_th), the current is governed by the voltage across the drain and source.

Symbol Definition Table

Symbol	Parameter	Standard Unit	Typical Magnitude
ID	Drain Current	Amperes (A)	μA (IC) to 100A (Power)
VGS	Gate-to-Source Voltage	Volts (V)	1.8V, 3.3V, 5V, 10V
VDS	Drain-to-Source Voltage	Volts (V)	0.1V (switch) to 400V
Vth	Threshold Voltage	Volts (V)	0.3V (logic) to 4.0V (standard)
Kn	Device Transconductance Parameter	A/V2	mA/V2 (IC) to A/V2 (Power)
k'n	Process Transconductance Parameter	A/V2	50 to 300 μA/V2
λ	Channel-Length Modulation	V-1	0.01 to 0.1 V-1 (often 0)
W / L	Width-to-Length Ratio	Dimensionless	0.1 to 100 (IC design)

Note: K_n = k'_n × (W/L). See Electronics Tutorials for foundational MOSFET operating regions.

When These Formulas Apply (And When They Fail)

Core Assumptions

The equations above represent the Shichman-Hodges model. This model assumes a long-channel device (typically channel length L > 1 μm). It assumes carrier mobility is constant and that the electric field across the channel is low enough that velocity saturation does not occur. If you are designing with deep submicron CMOS nodes (e.g., 65nm, 28nm, or smaller), these equations will yield massive errors. Submicron design requires complex empirical models like BSIM4, which account for short-channel effects, drain-induced barrier lowering (DIBL), and velocity saturation.

The Unit Mistakes That Break Calculations

When engineering students and hobbyists get the wrong answer, it is almost always due to one of these three unit traps:

1. Confusing k'_n and K_n: Datasheets and textbooks often use k'_n (process parameter, usually in μA/V²) and K_n (device parameter, usually in mA/V² or A/V²). If you plug a μA/V² value into the formula without converting to base Amperes, your current will be off by a factor of 1,000,000.
2. Mixing μm and m in the W/L ratio: The W/L ratio is dimensionless only if both width and length are in the same unit. If W = 4 μm and L = 0.25 μm, the ratio is 16. If you accidentally convert L to meters (0.25 × 10^-6 m) but leave W in μm, your ratio becomes 16,000,000, destroying the calculation.
3. Forgetting to square the overdrive voltage: In the saturation equation, the term is (V_GS - V_th)². A common arithmetic error is squaring the terms individually (V_GS² - V_th²) rather than squaring the difference.

Realistic Answer Magnitudes

Before you accept a calculated number, sanity-check it against the physical reality of your component:

• Integrated Circuit (Logic) MOSFETs: I_D should be in the microamp (μA) to low milliamp (1-10 mA) range. If you calculate 45 Amps for an on-chip logic gate, you missed a micro-prefix.
• Discrete Power MOSFETs (e.g., IRF540N, IRLZ44N): I_D will be in the single to double-digit Ampere range (5A to 100A). Threshold voltages are typically higher (2.0V to 4.0V).

Rearranged Forms for Design Calculations

In practical circuit design, you rarely solve for I_D directly. Usually, you know the target current and need to find the required gate voltage or transistor geometry. Assuming the saturation region (and ignoring λ for hand calculations), here are the rearranged forms:

Worked Examples with Unit Tracking

Let us apply the MOSFET current equations to two distinct scenarios: an integrated circuit design and a discrete power switching application. For detailed academic derivations of these models, refer to the MIT OpenCourseWare Microelectronic Devices curriculum.

Example 1: Saturation Region (IC Design Context)

Given: An NMOS transistor in a 0.25μm process has V_GS = 1.8V, V_th = 0.5V, k'_n = 250 μA/V², W = 4 μm, and L = 0.25 μm. The drain is tied to a 1.8V supply (V_DS = 1.8V). Assume λ = 0.

1. Determine the Region of Operation:
   Calculate the overdrive voltage: V_OV = V_GS - V_th = 1.8V - 0.5V = 1.3V.
   Compare V_DS to V_OV: Since V_DS (1.8V) ≥ V_OV (1.3V), the transistor is in Saturation.
2. Calculate Device Transconductance (K_n):
   First, find the dimensionless ratio: W/L = 4 μm / 0.25 μm = 16.
   Now, multiply by the process parameter (converting μA to base Amperes):
   K_n = 250 × 10^-6 A/V² × 16 = 4000 × 10^-6 A/V² = 4 mA/V² (or 0.004 A/V²).
3. Apply the Saturation Equation:
   I_D = (1/2) × K_n × (V_GS - V_th)²
   I_D = 0.5 × (4 × 10^-3 A/V²) × (1.3V)²
   I_D = (2 × 10^-3) × 1.69 = 3.38 × 10^-3 A.

Final Answer: I_D = 3.38 mA. (A highly realistic magnitude for an on-chip logic transistor).

Example 2: Triode Region (Discrete Power Switch Context)

Given: A logic-level power MOSFET is used as a low-side switch. V_GS = 5.0V (driven by a microcontroller), V_DS = 0.4V (measured across the channel under load), V_th = 1.5V, and the effective device parameter K_n is 35 A/V².

1. Determine the Region of Operation:
   Calculate overdrive: V_OV = 5.0V - 1.5V = 3.5V.
   Compare V_DS to V_OV: Since V_DS (0.4V) < V_OV (3.5V), the transistor is acting as a resistor in the Triode (Linear) Region.
2. Apply the Triode Equation:
   I_D = K_n [ (V_GS - V_th)V_DS - (V_DS² / 2) ]
   I_D = 35 A/V² × [ (3.5V × 0.4V) - (0.4V² / 2) ]
   I_D = 35 × [ 1.4 - (0.16 / 2) ]
   I_D = 35 × [ 1.4 - 0.08 ]
   I_D = 35 × 1.32

Final Answer: I_D = 46.2 A. (A realistic continuous current for a TO-220 power package with adequate heatsinking).

MOSFET Current Equations FAQ

Why do my calculated MOSFET drain currents not match the SPICE simulation?

The manual equations use the Shichman-Hodges model, which is a simplified, first-order approximation. SPICE simulators (like LTspice or PSpice) use advanced models like BSIM3 or BSIM4. These SPICE models account for dozens of secondary effects that the basic equations ignore, including mobility degradation at high vertical electric fields, velocity saturation, subthreshold leakage, and drain-induced barrier lowering (DIBL). For hand calculations, a 10% to 20% deviation from SPICE is normal and expected.

How do I calculate MOSFET current when the gate voltage is below the threshold?

When V_GS < V_th, the standard equations predict I_D = 0. In reality, a small leakage current flows, known as subthreshold conduction or weak inversion. In this region, the MOSFET behaves more like a BJT, and the current scales exponentially with V_GS rather than quadratically. The subthreshold current equation is roughly I_D = I_D0 × exp((V_GS - V_th) / nV_T), where V_T is the thermal voltage (~26mV at room temp) and n is the subthreshold swing factor. This is critical for calculating the standby power consumption of modern microcontrollers.

Does temperature affect the MOSFET current equations?

Yes, significantly. Temperature alters two main parameters in the equations. First, the threshold voltage (V_th) decreases by approximately 2mV/°C to 4mV/°C as temperature rises, which tends to increase current. Second, carrier mobility (μ_n, which is baked into k'_n) decreases as lattice scattering increases at higher temperatures, which tends to decrease current. In power MOSFETs operating at high currents, the mobility drop dominates, creating a negative temperature coefficient that naturally prevents thermal runaway when paralleling discrete devices. In low-voltage IC design, the V_th drop can dominate, leading to increased leakage currents at high temperatures.