Core MOS Transistor Equations: Derivations, Solved Problems, and Real-World Magnitudes

The Core MOS Transistor Equations and Symbol Definitions

When designing with Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), the Shichman-Hodges model remains the foundational framework for hand calculations and initial circuit sizing. While modern SPICE simulators use complex BSIM models with hundreds of parameters, the classical long-channel equations give you the intuitive grasp needed to bias an amplifier or size a power switch on the bench.

The behavior of an NMOS transistor is divided into three regions: Cutoff, Triode (Linear), and Saturation. The governing equations for drain current (I_D) are:

1. Cutoff Region (V_GS < V_th):
I_D = 0

2. Triode / Linear Region (V_GS > V_th AND V_DS < V_GS - V_th):
I_D = K_n [ (V_GS - V_th)V_DS - ½V_DS² ]

3. Saturation Region (V_GS > V_th AND V_DS ≥ V_GS - V_th):
I_D = ½ K_n (V_GS - V_th)² (1 + λV_DS)

Note: For basic DC biasing and power switching hand-calculations, the channel-length modulation term (1 + λV_DS) is often approximated as 1. We will use this simplification in the worked examples below.

Symbol Definition Table

Symbol	Parameter	Typical Units	Description
ID	Drain Current	A, mA, μA	Current flowing from drain to source.
VGS	Gate-to-Source Voltage	V	Control voltage applied between gate and source.
VDS	Drain-to-Source Voltage	V	Voltage potential across the drain and source terminals.
Vth	Threshold Voltage	V	Minimum VGS required to create a conducting inversion layer.
Kn	Device Transconductance Parameter	A/V², mA/V²	Combined process and geometry factor: Kn = k'n(W/L).
k'n	Process Transconductance	μA/V²	Fabrication constant: k'n = μnCox.
W / L	Width-to-Length Ratio	Dimensionless	Physical geometry of the transistor channel.
λ	Channel-Length Modulation	V-1	Accounts for slight ID increase in saturation due to VDS.

Real-World MOSFET Parameters (Bench Data)

Equations are useless without real silicon data. The table below provides typical parameters for four ubiquitous MOSFETs you will actually find in a lab or parts bin. Notice the massive difference in K_n (often derived from R_DS(on) in power parts) between small-signal and power devices.

Part Number	Type	Vth (Typ)	RDS(on) (Max)	Max ID	Primary Use Case
2N7000	Small-Signal NMOS	2.1 V	5.0 Ω @ VGS=10V	200 mA	Logic level shifting, LED driving
BS170	Small-Signal NMOS	1.5 V	5.0 Ω @ VGS=10V	500 mA	Low-voltage microcontroller switching
IRF540N	Standard Power NMOS	4.0 V	44 mΩ @ VGS=10V	33 A	Motor control, SMPS (requires 10V+ gate drive)
IRLZ44N	Logic-Level Power NMOS	2.0 V	22 mΩ @ VGS=5V	47 A	High-current switching direct from 5V MCUs

Source: Manufacturer datasheets (Infineon / Vishay). Always check the specific V_GS condition for R_DS(on); a "logic level" FET like the IRLZ44N guarantees low resistance at 5V, whereas the IRF540N will overheat if driven directly from a 5V Arduino pin.

Rearranged Forms for Circuit Design

On the bench, you rarely know I_D and need to find V_GS. You usually have a target current or voltage drop and need to find the required gate drive or verify if a specific part will work. Here are the algebraically rearranged forms of the saturation equation (ignoring λ):

• Solving for Gate Drive (V_GS):
  V_GS = V_th + √( 2I_D / K_n )
• Solving for Device Parameter (K_n):
  K_n = 2I_D / (V_GS - V_th)²
• Solving for Overdrive Voltage (V_OV):
  V_OV = (V_GS - V_th) = √( 2I_D / K_n )
• Solving for Saturation Boundary (V_DS(sat)):
  V_DS(sat) = V_GS - V_th

Worked Examples with Strict Unit Tracking

The most common point of failure in MOSFET hand calculations is unit mismanagement. Let's walk through two distinct scenarios with explicit unit tracking.

Problem 1: Small-Signal Saturation Current

Scenario: You are biasing a 2N7000 in the saturation region for a simple audio preamp stage. The datasheet and process parameters give you K_n = 500 μA/V² and V_th = 2.0 V. Your bias network sets V_GS = 5.0 V. What is I_D?

Step 1: Verify Region of Operation
Overdrive voltage V_OV = V_GS - V_th = 5.0 V - 2.0 V = 3.0 V.
Assuming the drain resistor allows V_DS > 3.0 V, the device is in saturation.

Step 2: Apply Equation with Unit Conversion
I_D = ½ K_n (V_GS - V_th)²
I_D = ½ × (500 × 10^-6 A/V²) × (5.0 V - 2.0 V)²
I_D = (250 × 10^-6 A/V²) × (3.0 V)²
I_D = 250 × 10^-6 × 9.0 A
I_D = 2250 × 10^-6 A = 2.25 mA

Problem 2: Power MOSFET Linear Region Voltage Drop

Scenario: You are using an IRLZ44N as a low-side switch for a 12V, 10A solenoid. The MCU drives the gate to V_GS = 5.0 V. The equivalent K_n for this massive die is roughly 40 A/V², and V_th = 2.0 V. What is the voltage drop across the MOSFET (V_DS) and the power dissipated?

Step 1: Recognize the Operating Region
Because it's acting as a closed switch, V_DS will be very small (millivolts). Therefore, V_DS < (V_GS - V_th), placing it deep in the Triode (Linear) region.

Step 2: Simplify the Triode Equation
In the deep triode region where V_DS is tiny, the ½V_DS² term becomes negligible. The equation simplifies to a linear resistor model:
I_D ≈ K_n (V_GS - V_th) V_DS

Step 3: Rearrange and Solve for V_DS
V_DS = I_D / [ K_n (V_GS - V_th) ]
V_DS = 10 A / [ 40 A/V² × (5.0 V - 2.0 V) ]
V_DS = 10 A / [ 40 A/V² × 3.0 V ]
V_DS = 10 A / 120 A/V = 0.0833 V (or 83.3 mV)

Step 4: Calculate Power Dissipation
P_D = I_D × V_DS = 10 A × 0.0833 V = 0.833 W.
Bench note: 0.83W in a TO-220 package without a heatsink will raise the case temperature by roughly 50°C above ambient. It will run hot to the touch but won't fail. For continuous duty, a small clip-on heatsink is recommended.

Assumptions, Unit Traps, and Realistic Magnitudes

Hand-calculating MOSFET circuits bridges the gap between abstract theory and physical silicon. However, you must understand the boundaries of these equations to avoid designing a circuit that works in LTspice but burns up on the breadboard.

When the Formula Applies (and When It Doesn't)

The Shichman-Hodges equations rely on the gradual channel approximation. They assume the electric field along the channel (x-axis) is much larger than the vertical field (y-axis). This holds true for long-channel devices (channel length L > 1 μm).

If you are designing with modern nanometer-scale CMOS processes (e.g., 65nm or 28nm nodes on a custom ASIC), these equations fail. Short-channel effects like velocity saturation and mobility degradation mean that I_D in saturation scales linearly with V_GS, not quadratically. For discrete bench components (like the 2N7000 or IRF540N), the long-channel model is highly accurate.

Unit Mistakes That Break Your Math

1. The Micro-Amp Trap: Process transconductance k'_n is almost always published in μA/V² (e.g., 150 μA/V² for a standard 0.35μm CMOS process). If you forget to multiply by 10^-6, your calculated drain current will be off by a factor of one million.
2. Confusing k'_n and K_n: k'_n is a property of the silicon foundry. K_n is the property of your specific transistor geometry. You must multiply k'_n by the W/L ratio to get K_n before plugging it into the current equations.
3. The Overdrive Squaring Error: In the saturation equation, the overdrive voltage (V_GS - V_th) is squared. If you calculate an overdrive of 3V, you must square the 3, not just multiply the final result by 2.

Realistic Answer Magnitudes

Developing an intuition for realistic magnitudes acts as a sanity check against calculator typos. According to foundational microelectronics principles outlined by MIT OpenCourseWare and standard semiconductor texts:

• Threshold Voltage (V_th): For discrete enhancement-mode NMOS, expect 1.5V to 4.0V. If your calculation yields a V_th of 15V or 0.05V, you have a unit error or are looking at a specialized depletion-mode device.
• Overdrive Voltage (V_OV): In analog amplifier design, V_OV is typically kept between 0.1V and 0.5V to maximize headroom while maintaining speed. In power switching, V_OV is pushed as high as possible (e.g., V_GS = 10V, V_th = 3V, yielding V_OV = 7V) to minimize R_DS(on).
• Drain Current (I_D): Small-signal discrete FETs max out around 200mA to 500mA. Power FETs in TO-220 packages handle 20A to 50A. If your hand calculation for a 2N7000 yields 14 Amps, you forgot to convert μA to A.

For deeper insights into modern power MOSFET topologies and thermal management, Infineon's MOSFET design support documentation provides excellent application notes on translating these static DC equations into dynamic switching loss calculations for high-frequency PWM environments.