When reading a schematic or debugging a breadboard, recognizing logic gate symbols instantly saves hours of tracing. Below is the definitive reference for the primary logic gates, mapping their Boolean functions to the distinct shapes used across global engineering standards.
The Complete Logic Gate Symbols Reference Table
The table below maps the seven fundamental logic gates to their traditional US shapes and their international rectangular equivalents, alongside the most common silicon you will find on a workbench.
| Gate Name | Boolean Function | ANSI/IEEE Shape (US Standard) | IEC 60617 Shape (International) | Common IC Part Numbers |
|---|---|---|---|---|
| AND | Output HIGH only if ALL inputs are HIGH | D-shaped with a flat vertical back and curved front | Rectangle with & qualifier inside | 74HC08, CD4081, 74LS08 |
| OR | Output HIGH if ANY input is HIGH | Curved shield shape (pointed front, scooped back) | Rectangle with ≥1 qualifier inside | 74HC32, CD4071, 74LS32 |
| NOT (Inverter) | Output is the exact opposite of the input | Triangle pointing right with a bubble on the tip | Rectangle with 1 inside and an output bubble | 74HC04, CD4069, 74LS04 |
| NAND | Output LOW only if ALL inputs are HIGH | AND gate D-shape with a bubble on the output tip | Rectangle with & inside and an output bubble | 74HC00, CD4011, 74LS00 |
| NOR | Output HIGH only if ALL inputs are LOW | OR gate shield shape with a bubble on the output tip | Rectangle with ≥1 inside and an output bubble | 74HC02, CD4001, 74LS02 |
| XOR | Output HIGH if inputs are DIFFERENT | OR gate shape with an extra curved line at the back | Rectangle with =1 qualifier inside | 74HC86, CD4030, 74LS86 |
| XNOR | Output HIGH if inputs are the SAME | XOR gate shape with a bubble on the output tip | Rectangle with =1 inside and an output bubble | 74HC266, CD4077, 74LS266 |
Regional Standards: ANSI/IEEE vs. IEC vs. DIN
Unlike residential wiring color codes, which vary wildly and dangerously by country, logic gate symbols are governed by strict, documented drafting standards. However, the standard you encounter depends heavily on the age and origin of the schematic.
ANSI/IEEE Std 91/91a (The US Traditional Standard)
This is the "shape-based" standard taught in most US universities and used by American hobbyists. It relies on distinct geometric silhouettes (the D-shape for AND, the curved shield for OR). It is highly intuitive for reading schematics by eye because you can recognize the gate type from its peripheral outline without reading the text inside it. If you are reading a schematic from a US-based company or a modern Arduino/Raspberry Pi shield design, you will almost exclusively see ANSI shapes.
IEC 60617 (The International Rectangular Standard)
Adopted heavily in Europe, Asia, and by the international scientific community, IEC 60617 abandons unique outer shapes. Instead, every gate is drawn as a uniform rectangle. The logic function is defined entirely by the qualifying symbol printed inside the box (e.g., & for AND, ≥1 for OR, =1 for XOR). While this makes complex, multi-input programmable logic arrays (PLAs) easier to draw in CAD software, it forces the reader to look closely at the internal text to distinguish an OR gate from an XOR gate.
DIN 40900 (The Legacy European Standard)
You will rarely see DIN 40900 in new designs, but it frequently appears when repairing legacy European industrial machinery, vintage automotive ECUs, or old telecommunications gear. DIN used a hybrid approach with rectangular boxes but distinct internal symbols that differ slightly from modern IEC. If you encounter a schematic from a German manufacturer dated before 1995, expect DIN variants.
Field Notes: Rows People Get Wrong & Faded Markings
When transitioning from textbook theory to bench troubleshooting, a few specific symbol interpretations consistently cause misdiagnoses.
The XOR vs. OR Confusion
In the ANSI standard, the difference between an OR gate and an XOR gate is a single secondary curved line drawn slightly offset from the back of the gate. On a densely packed schematic, or when zoomed out on a PDF, that secondary curve vanishes, and an XOR gate (74HC86) gets misread as an OR gate (74HC32). In IEC, the difference is the qualifier: ≥1 (OR) versus =1 (XOR). Always verify the internal text or the secondary curve before probing.
The Missing Inversion Bubble
When working on legacy industrial panels or repairing old audio gear, schematic silkscreens fade, and the critical inversion bubble on a NAND or NOR gate can look like a speck of dust or a printing artifact. Never guess the logic function from a faded symbol. Instead, trace the pins to the physical IC and read the silkscreen on the chip itself. A 74HC00 is always a Quad 2-Input NAND, regardless of what the faded board drawing implies. Cross-reference with the NXP 74HC00 datasheet to confirm the pinout before applying power.
Active-Low Inputs vs. Inverted Outputs
A bubble doesn't always mean a NOT gate. In both ANSI and IEC standards, a bubble on an input pin indicates an "active-low" trigger (like the Clear or Preset pins on a flip-flop), not a logical inversion of the signal path. Do not assume a bubble automatically means the signal is inverted before it enters the gate logic.
Frequently Asked Questions
What is the difference between ANSI and IEC logic gate symbols?
The primary difference is visual encoding. ANSI/IEEE uses distinct outer geometric shapes (like a D-shape for AND) to denote the gate type, making them easy to recognize at a glance. IEC 60617 uses uniform rectangles for all gates and relies on internal text qualifiers (like & for AND or ≥1 for OR) to define the function. ANSI is dominant in US commercial and hobbyist electronics, while IEC is the standard for international, military, and large-scale industrial schematics.
How do I identify a logic gate symbol if the inversion bubble is rubbed off?
If the schematic is damaged or the silkscreen is faded and you cannot confirm the presence of an inversion bubble (which changes an AND to a NAND, or an OR to a NOR), stop relying on the drawing. Use your multimeter in continuity mode to trace the input and output pins to the physical integrated circuit on the board. Identify the IC part number (e.g., 74LS00 vs 74LS08) and look up the manufacturer datasheet to definitively confirm the logic function.
Why do some schematics use a triangle with a bubble instead of a D-shape for a NOT gate?
The triangle with a bubble is the ANSI/IEEE standard symbol for a NOT gate (inverter). The D-shape is exclusively reserved for the AND gate. If you see a triangle without a bubble, it represents a non-inverting buffer, which is used to increase current drive capacity or isolate signal stages without changing the logic state (common IC: 74HC125 or 74HC244).
Are there logic gate symbols for 3-input or 4-input gates?
Yes. In the ANSI standard, a 3-input AND gate is drawn with the same D-shape as a 2-input gate, but with three lines entering the flat back instead of two. In the IEC rectangular standard, the shape remains identical, but the qualifier changes slightly to reflect the threshold; for example, a 3-input OR gate will still use the ≥1 qualifier, but the schematic will simply show three input lines entering the left side of the rectangle. Common bench ICs for these include the 74HC10 (Triple 3-Input NAND) and the 74HC21 (Dual 4-Input AND).
