The direct answer to what an inverting amplifier does is found in its core gain equation: Av = -Rf / Rin. It takes an input voltage, scales it by the ratio of the feedback resistor (Rf) to the input resistor (Rin), and flips the phase by 180 degrees. If you feed 1V DC into a circuit with a gain of -10, you get -10V DC out. This topology is the workhorse of analog signal conditioning, used everywhere from audio preamps to sensor interface circuits.
But reading the formula is easy; building a stable, noise-free circuit on the bench requires understanding the hidden nodes, input impedance trade-offs, and failure modes. Below is a complete bench-to-breadboard guide for designing and testing an inverting amplifier circuit diagram.
Topology and Node Labels
To understand the circuit, we must label the four critical nodes. The magic of the op-amp relies on negative feedback forcing the differential input voltage to zero.
- Node A (Signal Input): The AC or DC signal enters here through the input resistor (Rin).
- Node B (Inverting Input / Virtual Ground): This is the summing junction. Because the non-inverting input is tied to physical ground, negative feedback forces Node B to sit at 0V (virtual ground). No current actually flows into the op-amp's input pin; all current from Node A flows through Rf to Node D.
- Node C (Non-Inverting Input): Tied directly to the ground reference (0V). In precision DC circuits, a compensation resistor (Rcomp) is placed between this node and ground to balance input bias currents.
- Node D (Output): The amplified, inverted signal exits here. This node also feeds back through Rf to Node B to close the negative feedback loop.
Inverting vs. Non-Inverting: Why Choose This Topology?
Why use an inverting amplifier circuit diagram when the non-inverting topology offers the same gain capabilities without the 180-degree phase shift? The decision comes down to input impedance and common-mode voltage limits.
| Criteria | Inverting Topology | Non-Inverting Topology |
|---|---|---|
| Input Impedance | Low (Equal to Rin, e.g., 10kΩ) | Extremely High (Op-amp common-mode input impedance, often >1MΩ) |
| Phase Shift | 180° (Inverted) | 0° (In-phase) |
| Common-Mode Voltage | 0V (Virtual ground at Node B) | Varies with input signal (can violate op-amp input limits) |
| Best Use Case | Current-to-voltage conversion, summing mixers, low-impedance sources | Buffering high-impedance sensors (piezo, thermocouples) |
The inverting topology wins when your signal source has a low output impedance (like a DAC or an audio line-out) and you need to sum multiple signals together at the virtual ground node without them interacting with each other.
Design Walkthrough: Picking Real Component Values
Let's design a practical inverting amplifier circuit diagram with a voltage gain of -10 for an audio line-level signal (nominal 1Vpp). We need an output swing of 10Vpp, meaning our power supply rails must be at least ±12V to avoid clipping.
1. Select the Op-Amp: For audio and general analog signals, the Texas Instruments TL072 is a benchmark JFET-input dual op-amp. It offers low noise and high slew rate, unlike the LM358 which is better suited for slow DC signals.
2. Calculate Rf and Rin: We need Av = -10. Using the formula Av = -Rf / Rin, we can pick standard E24 resistor values. Let's choose Rin = 10kΩ. Therefore, Rf = 100kΩ. Bench Tip: Avoid using resistor values above 1MΩ for Rf. High-value feedback resistors increase thermal noise and make the circuit highly susceptible to stray parasitic capacitance, which can cause high-frequency oscillation.
3. Add the Bias Compensation Resistor (Rcomp): Real op-amps draw a tiny input bias current into their input pins. If the DC resistance seen by the inverting and non-inverting pins is mismatched, this bias current creates an unwanted DC offset voltage at the output. To fix this, place Rcomp between Node C (non-inverting input) and ground. The ideal value is the parallel equivalent of Rin and Rf: Rcomp = (Rin × Rf) / (Rin + Rf) = (10k × 100k) / 110k ≈ 9.1kΩ.
Behavior Table and Failure Modes at the Extremes
When troubleshooting a dead board, you need to know what happens when a component fails. Here is the failure-mode contrast for the core passive elements in the feedback network.
| Component | Failure Mode | Resulting Circuit Behavior |
|---|---|---|
| Feedback Resistor (Rf) | Open Circuit | Negative feedback is broken. The op-amp operates in open-loop mode. The output will instantly saturate to either the positive or negative supply rail, acting as a comparator. |
| Feedback Resistor (Rf) | Short Circuit | Gain drops to 0. Node B is directly tied to Node D. The output will sit at 0V (virtual ground), regardless of the input signal. |
| Input Resistor (Rin) | Open Circuit | No signal reaches the summing junction. The output will sit at 0V (or a few millivolts of DC offset due to input bias currents). |
| Input Resistor (Rin) | Short Circuit | Theoretical gain approaches infinity. Practically, the input source directly drives the virtual ground, and the output saturates to the supply rail or the op-amp's output current limit is hit, potentially damaging the IC. |
| Compensation (Rcomp) | Open or Short | Circuit still amplifies, but a measurable DC offset voltage (often 10mV to 100mV) will appear at the output, which can ruin precision DC measurements. |
Step-by-Step Breadboard Testing Procedure
Do not just plug in the signal and hope for the best. Follow this sequential power-up and verification routine to protect your IC and your test equipment.
- Build the Power Rails First: Connect your dual bench power supply to the breadboard. Set it to ±12V. Do not turn it on yet. Connect the positive rail to Pin 8 (V+) of the TL072, and the negative rail to Pin 4 (V-). Connect the center ground to the breadboard's ground bus.
- Place the Passive Components: Insert the 10kΩ Rin, 100kΩ Rf, and 9.1kΩ Rcomp. Wire Rcomp from Pin 3 (Node C) to ground. Wire Rin from your input terminal to Pin 2 (Node B). Wire Rf from Pin 2 (Node B) to Pin 1 (Node D / Output).
- Verify Dead Shorts: Before applying power, use your digital multimeter (DMM) in continuity mode. Check between V+ (Pin 8) and Ground, and V- (Pin 4) and Ground. You should read an open circuit (OL). If it beeps, you have a wiring fault that will short your power supply.
- Apply Power and Check Quiescent State: Turn on the power supply. With no input signal applied, probe Pin 1 (Output) with your DMM in DC voltage mode. It should read between -5mV and +5mV. If it reads ±11V, your feedback loop is wired backward or Rf is open.
- Inject the Test Signal: Connect a function generator to the input. Set it to a 1kHz sine wave, 1Vpp. Connect your oscilloscope Channel 1 to the input and Channel 2 to Pin 1 (Output).
- Verify Gain and Phase: The scope should show Channel 2 at exactly 10Vpp, and the waveforms should be exactly 180 degrees out of phase (when Ch1 crosses zero going up, Ch2 crosses zero going down).
Frequently Asked Questions
Why is the output signal inverted in an inverting amplifier circuit diagram?
The inversion is a direct result of Kirchhoff's Current Law at the virtual ground node (Node B). As the input voltage at Node A goes positive, current flows through Rin toward Node B. Because the op-amp's input pin draws zero current, the op-amp must pull its output voltage (Node D) negative to draw that exact same current through Rf, keeping Node B at 0V. A positive input mathematically requires a negative output to maintain the virtual ground equilibrium.
How do I add a DC offset to an inverting amplifier circuit diagram?
You can inject a DC offset by treating the non-inverting input (Node C) as a summing node rather than tying it directly to ground. Create a voltage divider from your positive supply to ground to generate your desired reference voltage (e.g., 2.5V), buffer it with another op-amp stage, and feed it into Node C. Because the op-amp forces Node B to match Node C, the output will be centered around that new DC reference rather than 0V. This is essential when interfacing bipolar AC signals to single-supply ADCs.
What causes clipping in an inverting amplifier circuit diagram?
Clipping occurs when the required output voltage exceeds the op-amp's power supply rails or its internal output swing limitations. A standard TL072 on ±12V rails cannot output a full ±12V; it will typically max out around ±10.5V due to internal transistor saturation voltages. If your gain is -10 and you input a 2Vpp signal, the math demands a 20Vpp output. Since the rails can only provide ~21Vpp total swing, the peaks will flatten out (clip). To fix this, either increase the supply voltage (up to the IC's absolute maximum of ±18V for the TL072), lower the gain, or reduce the input signal amplitude.
Can I use a single supply for an inverting amplifier circuit diagram?
Yes, but you must create an 'artificial ground' at half your supply voltage (Vcc/2). If you simply tie Node C to 0V on a single +12V supply, the op-amp cannot output negative voltages, meaning any positive input signal will immediately drive the output to the negative rail (0V), resulting in severe clipping. By biasing Node C to +6V, the virtual ground shifts to +6V, allowing the output to swing symmetrically between roughly +1V and +11V. For deeper insights on single-supply design, refer to application notes like the All About Circuits Op-Amp guide or manufacturer tutorials on single-supply biasing.
