The input resistance of an op-amp dictates how much it loads your source signal, and getting it wrong is the most common reason a sensor circuit yields garbage data. For low-impedance sources (under 1kΩ), a standard Bipolar Junction Transistor (BJT) op-amp with a 2MΩ input resistance is perfectly adequate. However, for high-impedance sources like piezo sensors, pH probes, or photodiodes (above 100kΩ), you must use a JFET or CMOS op-amp with an input resistance exceeding 1012Ω to prevent severe signal attenuation and DC offset errors.

This guide cuts through the semiconductor physics and gives you the exact decision framework, bias networks, and default part numbers you need to select the right input stage for your next build.

Decoding the Op-Amp Symbol and Pinout

Before selecting a part, you need to understand where input resistance actually lives in the schematic. The standard op-amp symbol is a triangle with five primary connections:

  • Non-Inverting Input (+): The high-impedance terminal where the signal phase is preserved.
  • Inverting Input (-): The high-impedance terminal used for feedback and signal inversion.
  • V+ (Positive Supply): The positive power rail (e.g., +15V or +5V).
  • V- (Negative Supply): The negative power rail or ground reference (e.g., -15V or 0V).
  • Vout (Output): The low-impedance driven output terminal.

Input resistance (or impedance) is measured in two ways: differential (the resistance measured directly between the + and - pins) and common-mode (the resistance from either input pin to ground). In modern designs, common-mode input resistance is usually the limiting factor for source loading. According to foundational texts like the All About Circuits semiconductor guide, an ideal op-amp has infinite input resistance, but real-world silicon dictates strict physical limits based on the input transistor topology.

Input Stage Technologies: BJT vs. JFET vs. CMOS

The input resistance of an op-amp is entirely determined by the semiconductor technology used for its first gain stage. Here is how the three dominant topologies compare in real-world operating regions.

Table 1: Op-Amp Input Stage Operation Regions and Typical Specifications
Technology Typical Input Resistance Input Bias Current Voltage Noise (1kHz) Best Application
Bipolar (BJT) 300kΩ to 2MΩ 50nA to 200nA 3 nV/√Hz (Very Low) Audio preamps, low-Z sensors, active filters
JFET 1012Ω (1 TΩ) 10pA to 100pA 15 nV/√Hz (Low) Audio mixing, moderate-Z transducers, sample-and-hold
CMOS >1012Ω (Often >1014Ω) 0.01pA to 1pA 30 nV/√Hz (Higher) pH meters, piezo buffers, photodiode amps, high-Z sensors
Bench Tip: Input bias current is the practical enemy of input resistance. Even if a CMOS op-amp has 1014Ω input resistance, if you use a 10MΩ feedback resistor, the voltage drop caused by the bias current flowing through that resistor will create a massive DC offset at the output. Always calculate your offset using the formula: V_offset = I_bias × R_feedback.

The Decision Path: Choosing Your Input Stage

Stop guessing which op-amp to pull from your bin. Use this decision tree to lock in the correct topology based on your source impedance and noise requirements. For a deeper dive into how these specifications interact at the silicon level, refer to Texas Instruments Application Report SLAA011A on understanding op-amp specifications.

Table 2: Input Resistance Decision Tree
IF your source impedance is... AND your priority is... THEN select this topology... Concrete Default Part
< 1kΩ (e.g., DAC output, mic) Lowest voltage noise Bipolar (BJT) NE5532
1kΩ to 100kΩ (e.g., guitar pickup) High input Z + good audio noise JFET TL072
> 100kΩ (e.g., piezo, pH probe) Maximum input Z, minimal loading CMOS LMC6482
> 1GΩ (e.g., ionization chamber) Ultra-low bias current (femtoamps) Precision CMOS LMC6001

Application Circuit: High-Impedance Piezo Sensor Buffer

Let us build a unity-gain buffer for a high-impedance piezo vibration sensor using the CMOS LMC6482. A piezo element acts like a small capacitor (typically 50nF to 200nF) in series with a voltage source. Its effective AC impedance is massive at low frequencies. If you use a BJT op-amp here, the low input resistance will form a high-pass filter with the piezo capacitance, killing your low-frequency response and loading the signal to near zero.

Component List and Values

  • U1: LMC6482 (Dual CMOS Op-Amp, 5V to 15V single supply)
  • R1 (DC Bias): 10MΩ (1/4W, 1% metal film)
  • R2 (Feedback): 10kΩ (Connects Vout to Inverting Input)
  • C1 (Decoupling): 100nF ceramic (Place within 2mm of V+ and V- pins)
  • C2 (Input Coupling - Optional): 1µF film (If blocking DC from the sensor)

Wiring and Bias Network Procedure

  1. Power the chip: Connect Pin 8 to +9V and Pin 4 to GND. Place C1 directly across these pins.
  2. Establish the DC path: Connect R1 (10MΩ) from the Non-Inverting Input (Pin 3) to a 4.5V voltage divider (creating a virtual ground for single-supply AC signals). Do not skip this resistor. Even though the CMOS input resistance is >1012Ω, the tiny input bias current (20fA) will slowly charge the parasitic capacitance of the piezo sensor until the input floats to the supply rail, saturating the output.
  3. Route the signal: Connect the piezo sensor's positive lead to the Non-Inverting Input (Pin 3) and the sensor's ground lead to circuit GND.
  4. Close the feedback loop: Connect R2 (10kΩ) from the Output (Pin 1) to the Inverting Input (Pin 2). Connect Pin 2 directly to the virtual ground (4.5V) for a gain of 1 (buffer).
Single-Supply Warning: The LMC6482 is a rail-to-rail output op-amp, but its input common-mode range does not quite reach the negative rail. If running on a single 5V supply, keep your input signals above 0.2V to avoid phase reversal. If you must measure signals down to exactly 0V, use a dual supply (e.g., ±5V) or add a negative charge pump.

Failure Modes and Multimeter Testing

Op-amps rarely fail from old age; they fail from Electrical Overstress (EOS) and Electrostatic Discharge (ESD). CMOS op-amps are particularly vulnerable to ESD because the ultra-thin gate oxide of the input transistors can be punctured by a static spike as low as 100V, creating a short to the substrate. BJT op-amps usually fail when the input-to-output differential voltage exceeds the breakdown rating, melting the internal bond wires or shorting the base-emitter junctions.

How to Test an Op-Amp with a Digital Multimeter (DMM)

You can perform a rapid go/no-go test on an unpowered op-amp using your DMM's diode-test function to check for blown input junctions or ESD shorts.

  1. Remove power: Ensure the circuit is completely de-energized and bulk capacitors are discharged.
  2. Set the DMM: Switch your multimeter to Diode Test mode (the symbol with the arrow and line).
  3. Test BJT Input Junctions: Place the red probe on the V- (ground/negative) pin and the black probe on the Inverting Input. A healthy BJT op-amp (like the NE5532) will read a forward voltage drop between 0.55V and 0.75V. If it reads 0.00V or OL (open line) in both directions, the input stage is destroyed.
  4. Test CMOS/JFET Gates: Place the probes between the inputs and the supply rails. Because these are voltage-controlled devices with insulated gates, a healthy part will read OL (Over Limit) in both directions. If you read a low resistance or a diode drop on a CMOS op-amp input, the gate oxide has been punctured by ESD. Bin the part.
  5. Verify Output Stage: Check the resistance between the Output pin and V+, and the Output pin and V-. You should see a high resistance or a standard protection diode drop (0.6V). A dead short means the output push-pull transistors have blown, usually from driving a capacitive load without a series isolation resistor.

The 'Safe Defaults' Cheat Sheet for 2026

When you are prototyping on the bench and do not have time to parse 40-page datasheets, rely on these three industry-standard workhorses. They are cheap, widely available, and represent the absolute safe defaults for their respective input resistance categories.

Table 3: The Safe Default Op-Amp Selection Matrix
Part Number Topology Input Resistance Supply Range Avg. Price (1k qty) When to Use It
NE5532 Bipolar ~300kΩ ±3V to ±22V $0.45 Active audio crossovers, low-impedance DAC buffers, and Sallen-Key filters where voltage noise must be under 5nV/√Hz.
TL072 JFET 1012Ω ±3V to ±18V $0.85 Guitar pedals, audio mixing consoles, and general-purpose buffering where you need high input Z without paying CMOS premiums.
LMC6482 CMOS >1012Ω 3V to 15V (Single) $2.10 Piezo sensors, battery-powered IoT devices, and single-supply 3.3V/5V microcontroller ADC buffers requiring rail-to-rail output swing.

If your source impedance is under 1kΩ, buy a tube of NE5532s. If you are building audio circuits with 10kΩ to 100kΩ potentiometers, stock up on TL072s. If you are interfacing high-impedance physical sensors to an Arduino or ESP32 ADC, the LMC6482 is the undisputed default choice. Stop second-guessing your input stage and let the source impedance make the decision for you.