When you wire inductors in parallel, the equivalent inductance drops according to the reciprocal formula ($1/L_{eq} = 1/L_1 + 1/L_2$), while the overall current handling capacity increases and the effective DC resistance (DCR) decreases. This topology is a staple in high-current switch-mode power supplies (SMPS) where a single inductor with the required inductance and saturation current ($I_{sat}$) would be physically massive or prohibitively expensive.
However, paralleling inductors is not as simple as paralleling resistors. Because inductors store energy in magnetic fields, physical placement, mutual inductance, and the difference between AC ripple sharing versus DC load sharing dictate whether your design will run efficiently or suffer catastrophic core saturation. Below is the complete design framework for implementing and testing this configuration.
The Parallel Inductor Topology & Node Behavior
In a standard parallel inductor bank, all input terminals tie to a common Node A (typically the switch node in a buck converter), and all output terminals tie to a common Node B (the output capacitor and load). Assuming zero mutual inductance (the magnetic fields do not interact), the equivalent inductance $L_{eq}$ for $N$ inductors is calculated as:
$$ \frac{1}{L_{eq}} = \frac{1}{L_1} + \frac{1}{L_2} + ... + \frac{1}{L_N} $$
The most critical mistake makers and junior engineers make is assuming current divides equally. It does not. Current sharing depends entirely on whether you are looking at the steady-state DC load or the high-frequency AC switching ripple.
• DC Load Current divides inversely proportional to DCR. The inductor with the lowest wire resistance hogs the DC current.
• AC Ripple Current divides inversely proportional to Inductance. The inductor with the lowest microhenry ($\mu H$) value hogs the high-frequency ripple.
To illustrate how this plays out with real components, examine the behavior table below using industry-standard shielded power inductors.
| Configuration (Node A to Node B) | Equivalent L ($L_{eq}$) | Effective DCR | AC Ripple Sharing | Saturation Risk |
|---|---|---|---|---|
| Matched: 10µH (14mΩ) || 10µH (14mΩ) | 5.0 µH | 7.0 mΩ | 50% / 50% | Low (Balanced) |
| Mismatched: 10µH (14mΩ) || 4.7µH (9mΩ) | 3.19 µH | 5.5 mΩ | 32% / 68% | High (4.7µH core saturates first from ripple) |
| Matched: 4.7µH (9mΩ) || 4.7µH (9mΩ) | 2.35 µH | 4.5 mΩ | 50% / 50% | Low (Balanced) |
| 3x Matched: 15µH (20mΩ) || 15µH || 15µH | 5.0 µH | 6.6 mΩ | 33% / 33% / 33% | Low (Balanced) |
Note: Data based on Coilcraft XGL6060 series composite core inductors. Always use matched parts from the same manufacturing batch to ensure DCR and L tolerances align.
Parallel vs. Series: Why Choose This Configuration?
Why put inductors in parallel instead of series? The decision comes down to your target impedance and current requirements. Series inductors sum their inductance ($L_{eq} = L_1 + L_2$) and sum their DCR, which is useful for filtering high-frequency noise in low-current signal lines. Parallel inductors reduce inductance and DCR, which is mandatory for high-current power delivery.
| Criteria | Inductors in Parallel | Inductors in Series |
|---|---|---|
| Total Inductance | Decreases (Reciprocal sum) | Increases (Linear sum) |
| Current Handling ($I_{sat}$) | Additive (Current splits across cores) | Limited by the weakest (lowest $I_{sat}$) component |
| Effective DCR | Decreases (Reduces $I^2R$ conduction losses) | Increases (Adds conduction losses) |
| Primary Use Case | High-current SMPS output filters (Buck/Boost) | Low-current EMI/RFI filtering, snubbers |
Failure Mode Contrast: What Breaks at the Extremes?
Understanding fault tolerance is critical when designing power stages. According to TI's Power Stage Designer guidelines, magnetic component failures usually manifest as either open windings (due to thermal overstress) or shorted windings (due to insulation breakdown).
- If one parallel inductor OPENS: The bank does not fail catastrophically. The open inductor is removed from the circuit, and $L_{eq}$ increases to the value of the remaining inductor(s). However, the remaining inductor must now carry 100% of the load current and ripple. If the remaining part was not sized with enough thermal and saturation headroom, it will overheat and saturate shortly after.
- If one parallel inductor SHORTS: This is a critical fault. The DCR of the shorted inductor drops to near-zero (just the resistance of the copper wire). Because DC current follows the path of least resistance, nearly all load current will rush through the shorted inductor. The parallel bank effectively becomes a short circuit across Node A and Node B, which will instantly trip the over-current protection (OCP) of your switching regulator or destroy the high-side MOSFET.
Design Walkthrough: Sizing a Parallel Bank for a 10A Buck Converter
Let's design an output filter for a 12V-to-3.3V synchronous buck converter delivering 10A continuous current. The controller requires a 5µH inductor with a peak current handling of at least 15A (accounting for the 3A peak-to-peak ripple current).
Finding a single 5µH inductor with a 15A $I_{sat}$ and a low DCR in a small footprint is difficult and expensive. Instead, we will parallel two identical Coilcraft XGL6060-100ME (10µH) inductors.
The reciprocal formula $1/L_{eq} = 1/L_1 + 1/L_2$ only holds true if mutual inductance ($M$) is zero. If you place two shielded inductors directly side-by-side on the PCB, their leakage magnetic fields will couple. If they are wound in the same direction and placed in-phase, the equivalent inductance will be higher than calculated ($L_{eq} = (L + M)/2$). If placed out-of-phase, it will be lower.
The Fix: Always place parallel inductors physically apart, or orient them at 90-degree orthogonal angles to nullify magnetic coupling. Consult the Coilcraft technical articles on magnetics placement for exact spacing guidelines regarding their specific shielded drum cores.
The Math Check:
Two 10µH XGL6060-100ME inductors in parallel yield exactly 5µH. Each part has a DCR of 13.8mΩ and an $I_{sat}$ (20% drop) of 14A. In parallel, the effective DCR drops to 6.9mΩ (excellent for efficiency), and the theoretical saturation current doubles to 28A, giving us massive headroom for our 15A peak requirement.
Step-by-Step Breadboard and Bench Verification
Before committing to a PCB layout, you must verify the parallel bank's behavior on the bench. Do not rely solely on datasheet values; manufacturing tolerances for inductors can swing $\pm 20\%$.
- Prepare the Test Fixture: Solder the two inductors in parallel onto a piece of perfboard or use heavy-gauge jumper wires on a high-current breadboard. Keep the lead lengths as short and symmetrical as possible to avoid introducing unequal parasitic series resistance.
- Measure DCR First: Use a precision multimeter (4-wire Kelvin measurement if possible) to measure the DC resistance across Node A and Node B. Verify it matches the calculated parallel DCR (e.g., ~6.9mΩ). If one branch reads significantly lower, that branch will hog the DC load current.
- Measure Inductance with an LCR Meter: Set your LCR meter to 100 kHz (the standard testing frequency for SMPS magnetics, as inductance rolls off at higher frequencies). Measure across Node A and Node B. Confirm the reading is within 10% of your calculated $L_{eq}$ (e.g., 5µH). If the reading is unexpectedly high (e.g., 6.5µH), your test leads are introducing mutual inductance, or the cores are coupling. Move them further apart.
- AC Ripple Injection Test: To verify AC current sharing, build a simple LC low-pass filter on the bench. Inject a 500 kHz square wave from a function generator through a small series resistor into the inductor bank. Use an oscilloscope with a current probe (or measure the voltage drop across a small shunt resistor in each leg) to observe the ripple current. Confirm the peak-to-peak ripple is dividing equally between the two branches.
- Thermal Imaging: Run the actual buck converter at full load for 15 minutes. Use a thermal camera or thermocouple to check the surface temperature of both inductors. A temperature delta of more than 5°C between the two components indicates unequal current sharing, likely caused by asymmetric PCB trace resistance or localized heat from nearby components.
By treating parallel inductors as a system governed by both AC impedance and DC resistance—and by strictly controlling their physical magnetic coupling—you can reliably scale up the current handling of your power designs without resorting to oversized, single-core magnetics.
