If you need higher total inductance to filter low-frequency ripple, wire your inductors in series. If you need higher current handling, lower DC resistance (DCR), and better thermal distribution, wire them in parallel. For 90% of modern power supply filtering and DC-DC converter applications, the parallel topology is the superior default. Series configurations are largely reserved for signal-path chokes and EMI filtering where current is low and cumulative impedance is the goal.
This guide breaks down the exact node topologies, failure modes at the extremes, and a real-world design walkthrough using off-the-shelf shielded power inductors to hit specific impedance and thermal targets.
Topology Definitions and Node Mapping
When combining inductors, we assume zero mutual inductance ($M = 0$). If you place unshielded inductors too close together, their magnetic fields couple, and the total inductance becomes $L_{total} = L_1 + L_2 \pm 2M$. To prevent this, always use magnetically shielded components (like molded ferrite or powder iron cores) or maintain physical separation of at least two core diameters.
Series Topology
In a series configuration, the same current flows through all components, while the voltage drop divides across them.
- Node A (Input): Connects to the first terminal of Inductor 1 ($L_1$).
- Node B (Junction): Connects the second terminal of $L_1$ to the first terminal of Inductor 2 ($L_2$).
- Node C (Output): Connects to the second terminal of $L_2$.
Formula: $L_{total} = L_1 + L_2 + ... + L_n$
Parallel Topology
In a parallel configuration, the voltage across all components is identical, while the current divides among the branches based on their DCR and inductive reactance.
- Node A (Input): Splits to the first terminals of both $L_1$ and $L_2$.
- Node B (Output): Recombines the second terminals of $L_1$ and $L_2$.
Formula: $\frac{1}{L_{total}} = \frac{1}{L_1} + \frac{1}{L_2} + ... + \frac{1}{L_n}$
Behavior and Failure Modes at the Extremes
Understanding how a network reacts when a single element drifts or fails catastrophically is critical for designing reliable power stages. Here is how series and parallel topologies contrast when pushed to the extremes.
| Condition / Event | Series Topology Reaction | Parallel Topology Reaction |
|---|---|---|
| $L_1$ Value Increases | $L_{total}$ increases linearly. Current remains unchanged, but total impedance rises. | $L_{total}$ increases slightly, but remains dominated by the smaller inductor. Current shifts slightly toward $L_2$. |
| $L_1$ Fails OPEN | Circuit breaks completely. Current drops to zero. Downstream load loses power safely. | $L_{total}$ drops to the value of $L_2$. $L_2$ is forced to carry 100% of the load current, likely leading to thermal runaway and core saturation. |
| $L_1$ Fails SHORT | $L_{total}$ drops to the value of $L_2$. Current may spike if the remaining inductance is insufficient to limit $di/dt$. | $L_{total}$ drops to near zero (limited only by trace inductance and DCR). Massive short-circuit current flows, typically destroying upstream MOSFETs or blowing the main fuse. |
| Core Saturation | If $L_1$ saturates, its inductance drops, but $L_2$ continues to limit $di/dt$. The network degrades gracefully. | If $L_1$ saturates, its impedance collapses. It hogs the AC ripple current, overheats, and shifts the thermal burden entirely onto itself. |
The failure contrast is stark: series fails safe (open), while parallel fails destructive (short/cascade saturation) unless protected by upstream fusing or current-mode control loops.
Design Walkthrough: Sizing a 10µH, 15A Buck Converter Filter
Let us design the output inductor for a synchronous buck converter stepping 12V down to 5V at a maximum continuous load of 15A. The control loop requires a total inductance of 10µH to maintain a 30% ripple current ratio at a 500kHz switching frequency.
The Problem with a Single Inductor:
Finding a single 10µH inductor rated for 15A $I_{RMS}$ (and ~20A $I_{SAT}$) usually forces you into a massive 12x12mm or 17x17mm footprint with a DCR around 3.5mΩ. At 15A, the copper loss is $I^2R = 15^2 \times 0.0035 = 0.78W$. Concentrating nearly a watt of heat into a single small magnetic body causes severe localized thermal rise, potentially degrading the surrounding PCB solder joints.
The Parallel Solution:
Instead of one 10µH part, we use two 20µH inductors in parallel.
- Inductance: 20µH || 20µH = 10µH total.
- Current Split: 15A total divides to 7.5A per inductor.
- Component Selection: We select the Coilcraft XEL4030-200ME. It is a 20µH shielded inductor with an $I_{RMS}$ rating of 8.5A and a maximum DCR of 5.4mΩ.
Thermal Math:
With 7.5A flowing through each 5.4mΩ inductor, the loss per component is $7.5^2 \times 0.0054 = 0.30W$. The total network loss is 0.60W (slightly better than the single large part due to the parallel DCR math: $5.4m\Omega / 2 = 2.7m\Omega$ total DCR). More importantly, that 0.60W is distributed across two physically separated 4x4mm component bodies, drastically lowering the peak thermal hotspot on the PCB.
Decision Tree: Which Configuration Should You Build?
Use this decision path to lock in your topology and component selection for your next prototype.
| Application Requirement | Topology Choice | Concrete Component Pick (Example) |
|---|---|---|
| High DC current (>10A), strict thermal limits, standard DC-DC filtering. | Parallel | Two Coilcraft XEL4030-200ME (20µH) in parallel to yield 10µH / 17A capacity. |
| Low current (<2A), EMI suppression, needing high impedance at high frequencies. | Series | Two Würth Elektronik 74404054100 (10µH) in series to yield 20µH / 2A capacity. |
| RF matching network, strict tolerance required, minimal DCR impact. | Series | Multiple low-value air-core or ceramic chip inductors in series to average out tolerance stack-up. |
| Battery pack balancing, high ripple current, space constrained vertically. | Parallel | Two low-profile shielded inductors (e.g., Coilcraft XGL3530 series) in parallel to halve the DCR and fit under low-clearance enclosures. |
Breadboard Testing and Parasitic Reality Checks
Testing inductor networks on a solderless breadboard is notoriously tricky. Breadboard contacts introduce parasitic resistance (often 0.1Ω to 0.5Ω per node) and parasitic capacitance (2pF to 5pF between adjacent rows). If you are testing a high-frequency parallel inductor network, that stray capacitance will create an unintended LC resonant tank, skewing your impedance measurements.
Follow this step-by-step procedure to accurately verify your series or parallel inductance on the bench:
- Isolate the Network: Ensure the inductor network is completely disconnected from any active circuitry, voltage sources, or ground planes. Measure across Node A and Node C (series) or Node A and Node B (parallel).
- Zero the LCR Meter: Set your LCR meter (e.g., Keysight U1733C or a DER EE DE-5000) to measure inductance ($L$) at 100kHz, which is close to standard switching converter frequencies. Short the test leads and zero out the lead inductance (usually 0.5µH to 1.5µH).
- Measure DCR First: Switch the meter to DC Resistance. For parallel networks, verify the DCR is exactly half of a single unit. If it is higher, you have a poor breadboard contact. Clean the inductor leads with isopropyl alcohol and reseat them.
- Measure Total Inductance: Connect the meter. For two 20µH inductors in parallel, you should read ~10µH. If you read significantly higher (e.g., 12µH), your inductors are too close together and are experiencing positive mutual coupling. Move them at least 15mm apart.
- Ring-Down Test (Optional): If you lack an LCR meter, build a quick RLC tank. Place a known capacitor (e.g., 1µF film) in parallel with your inductor network. Hit it with a 5V square wave from a function generator via a 1kΩ resistor. Measure the ringing frequency on an oscilloscope. Calculate inductance using $L = \frac{1}{(2\pi f)^2 C}$.
Final Recommendation and Default Pick
When designing power stages for DC-DC converters, LED drivers, or motor controllers, stop searching for the perfect single high-current inductor. The physical and thermal penalties of massive single-core inductors rarely justify the saved board space.
The Default Pick: If you are building a standard 5V to 12V power rail requiring 10µH and up to 15A, default to wiring two Coilcraft XEL4030-200ME (20µH, 8.5A $I_{RMS}$, 5.4mΩ DCR) inductors in parallel. This configuration yields exactly 10µH, drops the effective DCR to 2.7mΩ, distributes the thermal load across two 4x4mm footprints, and provides a graceful degradation path if one core approaches saturation. Keep them physically separated by at least 10mm on the PCB to eliminate mutual coupling, route symmetrical copper pours to the nodes, and you will have a robust, thermally stable power filter that outperforms a single monolithic part.
