Floating Gate Transistor Guide: How It Works and Which EEPROM ICs to Use

The Short Answer: What is a Floating Gate Transistor (and How Do You Actually Buy One?)

A floating gate transistor (FGT) is a specialized MOSFET featuring an electrically isolated 'floating' gate suspended between the control gate and the channel. By trapping electrons in this isolated gate via quantum tunneling, the transistor alters its threshold voltage, allowing it to store binary data without power. This is the foundational physics behind all modern non-volatile memory, including EEPROM, Flash, and EPROM.

Here is the critical bench reality: You cannot buy a discrete, 3-pin floating gate transistor to solder onto a PCB. They do not exist in standard component catalogs. FGTs are exclusively fabricated in dense arrays inside integrated circuits. Therefore, when a project requires 'floating gate' functionality, you are actually selecting an EEPROM, NOR Flash, or floating-gate analog trim IC. For 95% of hobbyist and prototyping applications requiring non-volatile byte storage, the concrete default pick is the Microchip 24LC256 I2C EEPROM.

Inside the Silicon: Symbol, Pinout, and Operation Regions

To understand how your EEPROM IC works under the hood, you need to look at the individual transistor level. In a schematic, the FGT symbol looks like a standard N-channel enhancement MOSFET, but with a second, broken gate line drawn between the main control gate and the semiconductor channel. This broken line represents the polysilicon floating gate, completely surrounded by silicon dioxide insulation.

Because you interact with these transistors via an IC package, here is the standard pinout for the 8-pin DIP/SOIC EEPROM packages (like the 24LC256) that house them:

• VCC (Pin 8): Power supply (2.5V to 5.5V).
• GND (Pin 4): Ground reference.
• SDA (Pin 5): Serial Data line (I2C).
• SCL (Pin 6): Serial Clock line (I2C).
• A0, A1, A2 (Pins 1, 2, 3): Hardware address configuration.
• WP (Pin 7): Write Protect (tie to GND to enable writes, VCC to lock).

Decision Tree: Selecting the Right Floating-Gate IC

Since you are buying an IC rather than a bare transistor, use this decision path to select the correct architecture for your project constraints.

Application Circuit: Wiring a 24LC256 EEPROM to an ESP32

Here is a complete, battle-tested circuit for adding 32KB of non-volatile floating-gate storage to an ESP32 via I2C. This setup runs at 3.3V, which is ideal for modern microcontrollers.

Materials List:

• 1x Microchip 24LC256-I/P (DIP-8 package)
• 2x 4.7 kΩ resistors (1/4W, 5% tolerance)
• 1x 100 nF (0.1 µF) ceramic decoupling capacitor
• ESP32 DevKit v1

1. Place the IC: Straddle the 24LC256 across the center trench of your solderless breadboard. Ensure the notch/dot on the chip faces the top (Pin 1 is top-left).
2. Power and Decoupling: Wire Pin 8 (VCC) to the ESP32 3V3 rail. Wire Pin 4 (GND) to the breadboard ground rail. Place the 100 nF capacitor directly across Pin 4 and Pin 8 to suppress I2C switching noise.
3. Address Pins: Wire Pins 1, 2, and 3 (A0, A1, A2) directly to GND. This sets the I2C base address to 0x50.
4. Write Protect: Wire Pin 7 (WP) to GND. If you accidentally wire this to 3.3V, the floating gates will be hardware-locked and your code will silently fail to write data.
5. I2C Bus and Pull-ups: Connect Pin 5 (SDA) to ESP32 GPIO 21. Connect Pin 6 (SCL) to ESP32 GPIO 22. Install one 4.7 kΩ pull-up resistor between SDA and 3V3, and the second 4.7 kΩ pull-up between SCL and 3V3. The ESP32 internal pull-ups are too weak (~45kΩ) for reliable I2C communication at 400kHz.

Failure Modes and Multimeter Testing

Floating gate transistors fail in two primary ways: oxide breakdown and charge leakage. Every time you program or erase the cell, high voltage is forced through the silicon dioxide insulator. Over time (typically 1,000,000 cycles for standard EEPROM), this oxide degrades, leading to stuck bits. Charge leakage occurs when trapped electrons slowly tunnel out over years, or rapidly if the IC is exposed to high ambient temperatures (above 85°C), resulting in data corruption.

You cannot probe the microscopic floating gate with a multimeter. However, you can verify the health of the EEPROM IC on your bench using a standard DMM:

1. Verify VCC: Set DMM to DC Volts. Probe Pin 8 and Pin 4. You must read between 3.1V and 3.5V. If it reads lower, your decoupling cap is missing or the IC is shorted.
2. Check Pull-ups: Probe the SDA and SCL lines relative to GND. Both should read very close to your VCC (e.g., 3.3V). If either reads 0V, you have a bus short or a misconfigured WP pin holding the line low.
3. Verify Address Straps: Set DMM to Continuity/Resistance. Probe A0, A1, and A2 against GND. You should read < 1 Ω. If you read open-loop (OL), the address pins are floating, and the IC will respond to random I2C addresses.
4. The 'Bricked' Test: If the IC draws more than 5 mA of quiescent current (measure by putting the DMM in series with VCC), the internal charge pump or I/O buffers have suffered an EOS (Electrical Overstress) event. Discard the chip.

Safe Default Part Numbers and Ratings

When ordering floating-gate ICs, always check the endurance (write cycles) and data retention specs. Avoid 'no-name' clones from unverified marketplace sellers, as counterfeit memory ICs often use degraded silicon that fails to hold charge past a few months.

For further reading on the underlying I2C protocols and memory architectures, refer to the official Microchip 24LC256 product documentation and the Winbond Serial NOR Flash portfolio. Stick to the 24LC256 for your first non-volatile storage builds; it is forgiving, widely available in through-hole DIP packages, and requires minimal external passives to get running.