How to Find the Voltage Gain of the Op Amp Circuit Shown (Inverting Topology)

When a textbook, exam, or schematic asks you to find the voltage gain of the op amp circuit shown in a standard inverting configuration, the direct answer relies on the ratio of two resistors. The closed-loop voltage gain ($A_v$) is calculated as $-R_f / R_{in}$. If the circuit shows a 100 kΩ feedback resistor ($R_f$) and a 10 kΩ input resistor ($R_{in}$), the voltage gain is exactly -10 V/V. The negative sign indicates a 180° phase inversion between the input and output signals.

However, calculating the ideal math is only the first step. Real-world bench design requires accounting for input bias currents, output swing limitations, and gain-bandwidth constraints. Below is a complete breakdown of the inverting topology, a practical design walkthrough using real component values, and a guide to testing it on the bench.

Topology Breakdown and Node Labels

To properly analyze the circuit, we must define the nodes. In the standard inverting amplifier topology, the operational amplifier (op-amp) uses negative feedback to force a "virtual short" between its inputs. Here are the specific node labels for the circuit shown:

• Node $V_{in}$: The AC or DC input signal source.
• Node A (Inverting Input, $V_-$): The junction where $R_{in}$ and $R_f$ meet. Because of negative feedback and the op-amp's high open-loop gain, this node is held at a "virtual ground" (0V), even though it is not physically connected to ground.
• Node B (Non-Inverting Input, $V_+$): Tied directly to physical ground (0V) in a dual-supply system, or to a mid-rail bias voltage in a single-supply system.
• Node $V_{out}$: The output pin of the op-amp, which sources or sinks current to maintain the virtual short at Node A.

Because Node B is at 0V, the virtual short forces Node A to 0V. Therefore, the input current is simply $I_{in} = V_{in} / R_{in}$. Assuming ideal infinite input impedance at the op-amp pins, all of $I_{in}$ flows through $R_f$, creating the output voltage $V_{out} = -I_{in} \times R_f$. Substituting $I_{in}$ yields the master equation: $A_v = -R_f / R_{in}$. For a deeper theoretical foundation, refer to the All About Circuits guide on inverting amplifiers.

Design Walkthrough: Picking Real Component Values

Let’s move from abstract formulas to a physical bench build. Our design goal is an inverting amplifier with a voltage gain of -15 V/V, capable of handling audio-frequency signals.

1. Select $R_{in}$: We want an input impedance of 10 kΩ to avoid loading the preceding audio stage. Therefore, $R_{in} = 10\text{ k}\Omega$.
2. Calculate $R_f$: Using $A_v = -15$, we need $R_f = 15 \times 10\text{ k}\Omega = 150\text{ k}\Omega$. Both 10k and 150k are standard 1% E96 resistor values.
3. Check Output Swing Limits: The TL072 is not a rail-to-rail op-amp. On ±12V rails, its guaranteed maximum output swing is typically ±10V. With a gain of 15, the maximum peak input voltage before clipping is $10V / 15 = 0.66V_{peak}$. If your input signal exceeds this, you must reduce the gain or increase the supply voltage.
4. Add Bias Compensation ($R_{comp}$): To minimize DC offset errors caused by input bias currents, place a compensation resistor between Node B and ground. The ideal value is the parallel combination of $R_{in}$ and $R_f$: $R_{comp} = (10k \times 150k) / (10k + 150k) \approx 9.37\text{ k}\Omega$. The closest standard 1% value is 9.1 kΩ.

Behavior Table and Failure Mode Extremes

Understanding what happens when components fail is critical for troubleshooting. The table below contrasts normal operation with extreme open and short failure modes for the primary passive components.

Why Inverting Over Non-Inverting?

When configuring an op-amp, you must choose between the inverting and non-inverting topologies. Here is why the inverting configuration (the circuit shown) is often preferred in specific scenarios:

• Virtual Ground Advantage: Because Node A is held at 0V, the op-amp inputs see zero common-mode voltage. This eliminates common-mode rejection ratio (CMRR) errors and distortion, making the inverting topology superior for high-precision DC and audio applications.
• Attenuation Capability: The inverting amplifier can have a gain of less than 1 (e.g., $R_f = 1k$, $R_{in} = 10k$ yields $A_v = -0.1$). A standard non-inverting amplifier has a minimum gain of +1 V/V and cannot attenuate signals without a front-end voltage divider.
• Summing Flexibility: By adding more input resistors to Node A, the inverting topology easily becomes a summing amplifier (mixer), a feat that requires complex resistor networks to replicate in a non-inverting configuration.

The primary trade-off is input impedance. The non-inverting topology offers near-infinite input impedance, whereas the inverting topology's input impedance is strictly equal to $R_{in}$. If your signal source has a high output impedance, you must use a non-inverting buffer first.

Step-by-Step Breadboard Testing

Follow these numbered steps to safely build and verify the -15 V/V inverting amplifier on a solderless breadboard. Safety Note: Always wire passive components and double-check power rails before applying power to prevent shorting the supply and damaging the IC.

1. Place the IC: Straddle the TL072 across the breadboard's center trench. Pin 1 (top left) is Output A, Pin 4 is V- (negative rail), and Pin 8 is V+ (positive rail).
2. Wire Power and Decoupling: Connect Pin 8 to the +12V rail and Pin 4 to the -12V rail. Critical: Place a 100 nF ceramic decoupling capacitor from Pin 8 to ground, and another from Pin 4 to ground, as close to the IC pins as physically possible to prevent high-frequency oscillation.
3. Wire the Feedback Loop: Insert the 150 kΩ $R_f$ resistor between Pin 2 (Inverting Input) and Pin 1 (Output).
4. Wire the Input and Ground: Insert the 10 kΩ $R_{in}$ resistor from your input signal jack to Pin 2. Connect the 9.1 kΩ $R_{comp}$ resistor from Pin 3 (Non-Inverting Input) to the ground rail.
5. Apply the Signal: Set a function generator to output a 1 kHz sine wave at 200 mV peak-to-peak (mVpp). Connect this to the input jack.
6. Verify with an Oscilloscope: Probe the output (Pin 1). You should see a 1 kHz sine wave at 3000 mVpp (3Vpp), inverted by 180° relative to the input channel. If the signal is a flat line at ±10V, your feedback resistor is open or your power rails are miswired.

Frequently Asked Questions

How do I find the voltage gain of the op amp circuit shown if it has multiple input resistors?

If the circuit shows multiple input resistors ($R_1, R_2, R_3$) all feeding into the inverting node (Node A) with a single $R_f$, it is a summing amplifier. The voltage gain for each individual input channel is calculated independently using the same formula: $A_{v1} = -R_f / R_1$, $A_{v2} = -R_f / R_2$, etc. The total output voltage is the inverted sum of the individual gains multiplied by their respective input voltages: $V_{out} = -[(V_1 \times R_f/R_1) + (V_2 \times R_f/R_2)]$.

Why does my measured voltage gain drop at higher frequencies?

This is caused by the op-amp's Gain-Bandwidth Product (GBWP). The TL072 has a typical GBWP of 3 MHz. The closed-loop bandwidth of your circuit is the GBWP divided by the absolute value of your closed-loop gain. For a gain of 15 V/V, the maximum bandwidth is $3,000,000 / 15 = 200\text{ kHz}$. If you push the input signal frequency past 200 kHz, the op-amp physically cannot slew fast enough, and the voltage gain will roll off at -20 dB/decade. To fix this, you must select an op-amp with a higher GBWP, such as the OPA1611 (40 MHz GBWP).

What happens if I accidentally swap the inverting and non-inverting inputs on the breadboard?

If you route $R_f$ to the non-inverting pin and ground the inverting pin, you create a positive feedback loop. Instead of amplifying linearly, the circuit becomes a Schmitt trigger (a comparator with hysteresis). The output will instantly latch to either the positive or negative saturation rail and will not respond linearly to the input signal. Always verify pinouts against the specific manufacturer's datasheet before powering the board.