Identifying a field effect transistor symbol on a schematic requires knowing which drafting standard the engineer used and how to read the channel arrow and intrinsic body diode. Below is the master reference table for MOSFET and JFET symbols, followed by a breakdown of regional standard variants and how to deduce pinouts when schematic markings are faded or incomplete.

Complete Field Effect Transistor Symbol & Pinout Table

The table below covers the most common FET architectures you will encounter in power supplies, motor controllers, and RF amplifiers. Use this to map schematic symbols to physical through-hole and surface-mount components.

FET Type IEEE/ANSI Symbol Features IEC Symbol Features Channel Arrow Direction Body Diode Orientation Common Bench Example
N-Channel Enhancement MOSFET Gate plate separated from channel by gap. Broken channel line. Rectangular box for gate structure. Broken channel line. Arrow on bulk/substrate points IN toward channel. Cathode at Drain, Anode at Source (Source to Drain). IRF540N, 2N7000, IRLZ44N
P-Channel Enhancement MOSFET Gate plate separated from channel by gap. Broken channel line. Rectangular box for gate structure. Broken channel line. Arrow on bulk/substrate points OUT away from channel. Anode at Drain, Cathode at Source (Drain to Source). IRF9540N, BS250, FDS6675
N-Channel JFET Gate arrow touches the solid channel line directly. No bulk terminal shown. Rectangular box with gate arrow touching the channel line. Arrow on gate points IN toward channel. None (Symmetrical, no intrinsic diode). 2N5457, J310, MPF102
P-Channel JFET Gate arrow touches the solid channel line directly. No bulk terminal shown. Rectangular box with gate arrow touching the channel line. Arrow on gate points OUT away from channel. None (Symmetrical, no intrinsic diode). J175, 2N5460
N-Channel Depletion MOSFET Gate plate separated by gap. Solid, continuous channel line. Rectangular box. Solid, continuous channel line. Arrow on bulk points IN toward channel. Cathode at Drain, Anode at Source. BSS148, 2N7008

IEEE vs. IEC Standard Variants and Regional Differences

The visual representation of a field effect transistor symbol changes depending on whether the schematic follows North American or international drafting standards. Understanding both prevents misinterpretation when reading imported datasheets or legacy military schematics.

IEEE 315 / ANSI Y32.2 (North American Standard)

In the IEEE standard, the gate of a MOSFET is drawn as a simple parallel line (or plate) separated from the vertical channel line by a distinct gap. This gap represents the silicon dioxide insulating layer. The source, drain, and bulk (substrate) terminals connect directly to the vertical channel line. For JFETs, the gate arrow physically touches the channel line, indicating a direct PN junction rather than an insulated gate. This is the style you will see in almost all US-based university textbooks, All About Circuits tutorials, and legacy CAD libraries.

IEC 60617 (International / European Standard)

The IEC standard replaces the parallel plate and gap with a rectangular envelope (a box) drawn around the gate and channel connections. The box represents the physical boundary of the semiconductor component. Inside the box, the channel is still drawn as a solid line (depletion/JFET) or broken line (enhancement MOSFET). The IEC style is dominant in European industrial automation schematics, modern Altium Designer default libraries, and IEC-compliant power distribution single-line diagrams. If you see a transistor symbol enclosed in a square box with terminals protruding from the sides, you are looking at an IEC FET symbol.

Code & Safety Caveat: When wiring high-power MOSFETs (like the IRLZ44N in a 12V solar charge controller) based on a schematic, always verify the physical pinout against the manufacturer datasheet, not just the schematic symbol. The symbol defines electrical behavior (Gate, Drain, Source), but physical TO-220 packages almost universally arrange pins as Gate-Drain-Source when viewed from the front. Swapping Drain and Source based on a mirrored schematic drawing will cause an immediate short circuit through the intrinsic body diode.

3-Pin vs. 4-Pin Symbol Variants

A standard power MOSFET symbol shows three terminals: Gate, Drain, and Source. The bulk (substrate) terminal is internally tied to the Source inside the physical package, which is why the arrow appears to originate from the Source lead. However, in integrated circuits (ICs) and specialized RF MOSFETs, you will see a 4-pin symbol where the bulk terminal is drawn separately. In a 4-pin symbol, the arrow is placed on the bulk terminal itself, pointing toward the channel for N-type and away for P-type. This separate bulk connection allows designers to apply body biasing to adjust the threshold voltage (Vth) dynamically.

Common Mistakes and Reading Faded Datasheet Schematics

Schematic symbols in older service manuals or heavily compressed PDF datasheets often suffer from smudged ink, missing arrows, or broken lines. Here is how to safely interpret ambiguous symbols and avoid the most common bench errors.

The 'Rows People Get Wrong' Notes

  • Confusing the Source and Drain on Symmetrical Symbols: In a JFET or a standard MOSFET drawn without the body diode, the symbol looks perfectly symmetrical. Beginners often assume Drain and Source are interchangeable. While physically true for the silicon die in low-voltage JFETs, power MOSFETs have an intrinsic body diode. The rule: The Source is always the terminal connected to the bulk/substrate and the body diode. If the symbol shows a diode, the Source is on the side of the diode's anode (for N-channel) or cathode (for P-channel).
  • Misreading the Arrow on P-Channel MOSFETs: Many hobbyists assume the arrow on a P-channel MOSFET points in the direction of conventional current flow. It does not. The arrow indicates the direction of the PN junction between the bulk and the channel. For a P-channel device, the bulk is N-type and the channel is P-type, so the arrow points out (from P to N). Memorize: 'N' means arrow points 'iN'.
  • Ignoring the Broken vs. Solid Channel Line: A broken line between Drain and Source means the device is normally OFF (Enhancement mode). A solid line means it is normally ON (Depletion mode or JFET). Swapping an enhancement MOSFET for a depletion MOSFET in a crowbar overvoltage circuit will result in the load being powered constantly until the gate is actively driven to shut it off.

Deducing Channel Type from Faded or Missing Arrows

If you are reverse-engineering a board or reading a faded schematic where the directional arrow on the FET symbol is completely missing, you can definitively identify the channel type by looking at the intrinsic body diode. This diode is a byproduct of the vertical silicon structure in power MOSFETs and is always drawn on the symbol.

According to Texas Instruments MOSFET design fundamentals, the body diode is formed between the drain drift region and the source/body implant. Therefore:

  1. Locate the diode symbol drawn parallel to the channel.
  2. Identify the cathode (the bar) and the anode (the triangle).
  3. If the cathode connects to the Drain and the anode connects to the Source, it is an N-Channel MOSFET. (Current can only flow backward from Source to Drain if forward-biased).
  4. If the anode connects to the Drain and the cathode connects to the Source, it is a P-Channel MOSFET.

This trick is invaluable when troubleshooting H-bridge motor drivers. If you accidentally install a P-channel MOSFET in the low-side position of an H-bridge, the body diode will conduct during the negative half-cycle of the PWM signal, causing severe shoot-through currents and likely destroying the transistor and gate driver IC. Always verify the diode direction on the schematic against the physical multimeter diode-test reading on the bench before applying gate drive voltage.